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[,b ï¿½ ï¿½ï¿½ ï¿½ï¿½ï¿½ Xï¿½ï¿½Nï¿½ vv } ï¿½ ï¿½ï¿½ï¿½6 4 ï¿½ï¿½;,U(ï¿½ ï¿½2ï¿½ï¿½ï¿½nï¿½vDï¿½ï¿½ï¿½ ï¿½ï¿½(ï¿½Tg[ fï¿½ï¿½ï¿½Z ï¿½ï¿½ï¿½Oï¿½ï¿½ï¿½ Y0ï¿½ï¿½_Yï¿½?x Iï¿½ï¿½ï¿½ï¿½ï¿½ % /:ï¿½ï¿½ï¿½=ï¿½ sï¿½a +ï¿½, ï¿½5ï¿½ fï¿½ X ï¿½ ï¿½ï¿½ï¿½ wï¿½ ï¿½K ï¿½ Sw~ Y 8ï¿½o]I |@ï¿½KS ï¿½F >ï¿½5ï¿½ï¿½ï¿½ Iï¿½ ï¿½arh 0ï¿½ï¿½ ï¿½ï¿½V m> F ï¿½ï¿½U-ï¿½ Oï¿½CQï¿½ @#ï¿½=ï¿½ kï¿½j bï¿½ ï¿½ï¿½`ï¿½Zï¿½ï¿½ï¿½ + ï¿½ tH - #ï¿½+ï¿½ ï¿½ï¿½Yï¿½ï¿½ï¿½g ï¿½ 8r ï¿½ S ï¿½ï¿½ ï¿½n ï¿½ |ï¿½ï¿½ï¿½aLVï¿½ï¿½ï¿½@ H K ï¿½ï¿½86ï¿½ï¿½ï¿½ ï¿½ $ ï¿½ ï¿½ ï¿½ ï¿½ ï¿½ jï¿½ï¿½B' ï¿½ !uxï¿½ ï¿½ ï¿½ / ï¿½ï¿½ kï¿½qï¿½ï¿½\ï¿½ ï¿½)ï¿½ï¿½;wï¿½ ?ï¿½ï¿½lx5ï¿½ uï¿½ ï¿½ ï¿½-U ï¿½ï¿½)ï¿½ `#ï¿½ï¿½ï¿½ ï¿½ï¿½ï¿½ï¿½ ï¿½ ï¿½ï¿½ï¿½z@ï¿½ï¿½ï¿½ ï¿½Hï¿½ï¿½ï¿½8 2ï¿½Kp ï¿½ xï¿½ï¿½ wï¿½~ï¿½ï¿½ ï¿½ï¿½ Zx/tï¿½<ï¿½ ï¿½ï¿½ï¿½ï¿½ % ï¿½ ï¿½ï¿½rï¿½ï¿½0#z.M7ï¿½W ï¿½ï¿½ ï¿½ï¿½ï¿½ï¿½<ï¿½ï¿½ï¿½ ï¿½ï¿½CE ï¿½ï¿½eNï¿½ ï¿½ ucï¿½Mï¿½ ï¿½m@ï¿½ï¿½ /ï¿½Jï¿½Dï¿½ ï¿½Hï¿½w9(ï¿½ ï¿½ï¿½g ï¿½3 nï¿½ï¿½Tpqblï¿½9 !ï¿½ ï¿½N ï¿½I=b-;ï¿½ Hï¿½ï¿½ï¿½ï¿½gï¿½ ï¿½6?SiB.ï¿½ï¿½6ï¿½qWï¿½ï¿½ ï¿½+ï¿½ ï¿½r 1ï¿½ï¿½ ï¿½ ;ï¿½q G [default is %d] [default is %s] %s specify variant of 960 architecture -b add code to collect statistics about branches taken -link-relax preserve individual alignment directives so linker can do relaxing (b.out format only) -no-relax don't alter compare-and-branch instructions for long displacements specify variant of SPARC architecture -bump warn when assembler switches architectures -sparc ignored --enforce-aligned-data force .long, etc., to be aligned correctly -relax relax jumps and branches (default) -no-relax avoid changing any jumps and branches %s input file : %s options passed : output file : %s target : %s time stamp : %s D30V options: -O Make adjacent short instructions parallel if possible. -n Warn about all NOPs inserted by the assembler. -N Warn about NOPs inserted after word multiplies. -c Warn about symbols whoes names match register names. -C Opposite of -C. -c is the default. TIC4X options: -mcpu=CPU -mCPU select architecture variant. CPU can be: 30 - TMS320C30 31 - TMS320C31, TMS320LC31 32 - TMS320C32 33 - TMS320VC33 40 - TMS320C40 44 - TMS320C44 -mrev=REV set cpu hardware revision (integer numbers). Combinations of -mcpu and -mrev will enable/disable the appropriate options (-midle2, -mlowpower and -menhanced) according to the selected type -mbig select big memory model -msmall select small memory model (default) -mregparm select register parameters (default) -mmemparm select memory parameters -midle2 enable IDLE2 support -mlowpower enable LOPOWER and MAXSPEED support -menhanced enable enhanced opcode support constraint violations for constraint violations instructions might violate contraints might violate contraints EXTENSION is combination of: Registers will not need any prefix. Registers will require a `$'-prefix. emulate output (default %s) Record the cpu type -EB assemble code for a big-endian cpu -EL assemble code for a little-endian cpu -FIXDD assemble code for fix data dependency -G gpnum assemble code for setting gpsize and default is 8 byte -KPIC assemble code for PIC -NWARN assemble code for no warning message for fix data dependency -O0 assembler will not perform any optimizations -SCORE3 assemble code for target is SCORE3 -SCORE5 assemble code for target is SCORE5 -SCORE5U assemble code for target is SCORE5U -SCORE7 assemble code for target is SCORE7, this is default setting -USE_R1 assemble code for no warning message when using temp register r1 -V Sunplus release version -V print assembler version number -Qy, -Qn ignored -march=score3 assemble code for target is SCORE3 -march=score7 assemble code for target is SCORE7, this is default setting S390 options: -mregnames Allow symbolic names for registers -mwarn-areg-zero Warn about zero base/index registers -mno-regnames Do not allow symbolic names for registers -m31 Set file format to 31 bit format -m64 Set file format to 64 bit format ops were: --32/--64/--x32 generate 32bit/64bit/x32 code --MD FILE write dependency information in FILE (default none) --alternate initially turn on alternate macro syntax --compress-debug-sections compress DWARF debug sections using zlib --debug-prefix-map OLD=NEW map OLD to NEW in debug information --defsym SYM=VAL define symbol SYM to given value --disp-size-default-22 branch displacement with unknown size is 22 bits (default) --disp-size-default-32 branch displacement with unknown size is 32 bits --divide do not treat `/' as a comment character --divide ignored --execstack require executable stack for this object --fatal-warnings treat warnings as errors --fix-v4bx Allow BX in ARMv4 code --gdwarf-2 generate DWARF2 debugging information --gstabs generate STABS debugging information --gstabs+ generate STABS debug info with GNU extensions --hash-size= set the hash table size close to --help show this message and exit --itbl INSTTBL extend instruction set to include instructions matching the specifications defined in file INSTTBL --listing-cont-lines set the maximum number of continuation lines used for the output data column of the listing --listing-lhs-width set the width in words of the output data column of the listing --listing-lhs-width2 set the width in words of the continuation lines of the output data column; ignored if smaller than the width of the first line --listing-rhs-width set the max width in characters of the lines from the source file --m32bit-doubles [default] --m64bit-doubles --march= Generate code for . Valid choices for are v0_v10, v10, v32 and common_v10_v32. --mbig-endian-data --mint-register= --mlittle-endian-data [default] --mpid --mrelax --msmall-data-limit --muse-conventional-section-names --muse-renesas-section-names [default] --no-underscore User symbols do not have any prefix. --nocompress-debug-sections don't compress DWARF debug sections --noexecstack don't require executable stack for this object --pic Enable generation of position-independent code. --reduce-memory-overheads prefer smaller memory use at the cost of longer assembly times --size-check=[error|warning] ELF .size directive check (default --size-check=error) --statistics print various measured statistics from execution --strip-local-absolute strip local absolute symbols --target-help show target specific options --traditional-format Use same format as native assembler when possible --underscore User symbols are normally prepended with underscore. --version print assembler version number and exit --warn don't suppress warnings -D produce assembler debugging messages -EB assemble code for a big-endian cpu -EB,-big produce big endian code and data -EL generate code for little endian mode (default) -EB generate code for big endian mode -mwarn-expand warn if pseudo operations are expanded -mxp enable i860XP support (disabled by default) -mintel-syntax enable Intel syntax (default to AT&T/SVR4) -EL assemble code for a little-endian cpu -EL,-little produce little endian code and data -I DIR add DIR to search list for .include directives -Ip synonym for -ignore-parallel-conflicts -J don't warn about signed overflow -K warn when differences altered for long displacements -KPIC generate PIC -L,--keep-locals keep local symbols (e.g. starting with `L') -M,--mri assemble in MRI compatibility mode -N Warn when branches are expanded to jumps. -O try to optimize code. Implies -parallel -Q ignored -Q ignored -V print assembler version number -Q ignored -V print assembler version number --32/--64 generate 32bit/64bit code -Q ignored -V print assembler version number -k ignored -R fold data section into text section -V print assembler version number -Qy, -Qn ignored -W --no-warn suppress warnings -Wnp synonym for -no-warn-explicit-parallel-conflicts -Wnuh synonym for -no-warn-unmatched-high -Wp synonym for -warn-explicit-parallel-conflicts -Wuh synonym for -warn-unmatched-high -X ignored -Z generate object file even after errors -c print a warning if a comment is found -f skip whitespace and comment preprocessing -fixed-special-register-names Allow only the original special register names. -g --gen-debug generate debugging information -globalize-symbols Make all symbols global. -gnu-syntax Turn off mmixal syntax compatibility. -h, -H Don't execute, print this help text. Deprecated. -ignore-parallel-conflicts do not check parallel instructions -linker-allocated-gregs If there's no suitable GREG definition for the operands of an instruction, let the linker resolve. -m32r disable support for the m32rx instruction set -m32r2 support the extended m32r2 instruction set -m32rx support the extended m32rx instruction set -mQ - enable relaxation at assembly time. DANGEROUS! -mP - enable polymorph instructions -mall-opcodes accept all AVR opcodes, even if not supported by MCU -mno-skip-bug disable warnings for skipping two-word instructions (default for avr4, avr5) -mno-wrap reject rjmp/rcall instructions with 8K wrap-around (default for avr3, avr5) -march=ARCH enable instructions from architecture ARCH -march=CPU[,+EXTENSION...] generate code for CPU and EXTENSION, CPU is one of: -march=ms1-16-002 allow ms1-16-002 instructions (default) -march=ms1-16-003 allow ms1-16-003 instructions -march=ms1-64-001 allow ms1-64-001 instructions -march=ms2 allow ms2 instructions -mavxscalar=[128|256] encode scalar AVX instructions with specific vector length -mbig-endian generate big-endian code -mcpu= specify the name of the target CPU -mdsbt code uses DSBT addressing -mextension enable extension opcode support -mfdpic assemble for the FDPIC ABI -mindex-reg support pseudo index registers -mip2022 restrict to IP2022 insns -mip2022ext permit extended IP2022 insn -mlittle-endian generate little-endian code -mmnemonic=[att|intel] use AT&T/Intel mnemonic -mnaked-reg don't require `%%' prefix for registers -mno-bcond17 disable b disp17 instruction -mno-dsbt code does not use DSBT addressing -mno-fdpic/-mnopic disable -mfdpic -mno-pic code addressing is position-dependent -mno-stld23 disable st/ld offset23 instruction -mold-gcc support old (<= 2.8.1) versions of gcc -mpic code addressing is position-independent -mpid=far code uses position-independent data addressing, GOT accesses use far DP addressing -mpid=near code uses position-independent data addressing, GOT accesses use near DP addressing -mpid=no code uses position-dependent data addressing -mrelax Enable relaxation -msse-check=[none|error|warning] check SSE instructions -msse2avx encode SSE instructions with VEX prefix -msyntax=[att|intel] use AT&T/Intel syntax -mtune=CPU optimize for CPU, CPU is one of: -mv850 The code is targeted at the v850 -mv850e The code is targeted at the v850e -mv850e1 The code is targeted at the v850e1 -mv850e2 The code is targeted at the v850e2 -mv850e2v3 The code is targeted at the v850e2v3 -mwarn-signed-overflow Warn if signed immediate values overflow -mwarn-unsigned-overflow Warn if unsigned immediate values overflow -n Do not optimize code alignment -q quieten some warnings -nIp synonym for -no-ignore-parallel-conflicts -no-bitinst disallow the M32R2's extended bit-field instructions -no-expand Do not expand GETA, branches, PUSHJ or JUMP into multiple instructions. -no-ignore-parallel-conflicts check parallel instructions for -no-merge-gregs Do not merge GREG definitions with nearby values. -no-parallel disable -parallel -no-predefined-syms Do not provide mmixal built-in constants. Implies -fixed-special-register-names. -no-warn-explicit-parallel-conflicts do not warn when parallel -no-warn-unmatched-high do not warn about missing low relocs -nocpp ignored -nosched disable scheduling restrictions -o OBJFILE name the object-file output OBJFILE (default a.out) -parallel try to combine instructions in parallel -relax Create linker relaxable code. -s ignored -w ignored -warn-explicit-parallel-conflicts warn when parallel instructions -warn-unmatched-high warn when an (s)high reloc has no matching low reloc -x Do not warn when an operand to GETA, a branch, PUSHJ or JUMP is not known to be within range. The linker will catch any errors. Implies -linker-allocated-gregs. -xauto automagically remove dependency violations (default) -xnone turn off dependency violation checking -xdebug debug dependency violation checker -xdebugn debug dependency violation checker but turn off dependency violation checking -xdebugx debug dependency violation checker and turn on dependency violation checking @FILE read options from FILE %s; (Requires %s; requested architecture is %s.) *input_line_pointer == '%c' 0x%02x ARM-specific assembler options: Blackfin specific assembler options: FR30 specific command line options: GNU assembler version %s (%s) using BFD version %s. Insn slot not set in unwind record. M32C specific command line options: M32R specific command line options: MMIX-specific command line options: RX specific command line options: Score-specific assembler options: V850 options: XC16X specific command line options: XSTORMY16 specific command line options: Z8K options: -z8001 generate segmented code -z8002 generate unsegmented code -linkrelax create linker relaxable code branch relocation truncate (0x%x) [-2^9 ~ 2^9] branch relocation truncate (0x%x) [-2^19 ~ 2^19] branch relocation truncate (0x%x) [-2^9 ~ 2^9]!%s does not use a sequence number!samegp reloc against symbol without .prologue: %s"%d" (instance number %d of a %s label)".else" without matching ".if"".elseif" after ".else"".elseif" without matching ".if"".endif" without ".if"".option" directive conflicts with initial definition".option" directive must appear before any instructions".option" directive overrides command-line (default) value# Example of `%s' instructions .sect .text _start: # bars register# conflicts length#4 not valid on H8/300.###$DPR_BYTE not supported in this context$DPR_GOT not supported in this context$DPR_HWORD not supported in this context$DPR_WORD not supported in this context$DSBT_INDEX must be used with __c6xabi_DSBT_BASE$DSBT_INDEX not supported in this context$GOT not supported in this context$PCR_OFFSET not supported in this context$dbg and $depc are disabled when DEBUG is off$hi and $lo are disabled when MUL and DIV are off$mb0, $me0, $mb1, and $me1 are disabled when COP is off% operator needs absolute expression%d error%s, %d warning%s, generating bad object file%d error%s, %d warning%s, no object file generated%d warnings, treating warnings as errors%s %s (%08lx %08lx) after %s (%08lx %08lx)%s -- `%s'%s -- statement `%s' ignored%s ISA does not support DSP ASE%s ISA does not support DSP R2 ASE%s ISA does not support MCU ASE%s ISA does not support MT ASE%s ISA does not support SmartMIPS%s ISA does not support SmartMIPS ASE%s NOP inserted%s `%s' already has an alias `%s'%s argument must be a string%s for `%s'%s instruction, operand %d doesn't match%s isa does not support 64-bit floating point registers%s isa does not support 64-bit registers%s may not occupy the delay slot of another branch insn.%s must have a constant value%s out of domain (%d is not a multiple of %d)%s out of range (%d is not between %d and %d)%s out of range (0x%s is not between 0x%s and 0x%s)%s register same as write-back base%s relocations do not fit in %d bytes%s relocations do not fit in %d bytes %s shortened to %s%s symbol recursion stopped at second appearance of '%s'%s unsupported%s without %s%s: data size %ld %s: global symbols not supported in common sections%s: no such section%s: output of 1st instruction is the same as an input to 2nd instruction - is this intentional ?%s: output of 2nd instruction is the same as an input to 1st instruction - is this intentional ?%s: total time in assembly: %ld.%06ld %s: unexpected function type: %d%s: unrecognized processor name%s: would close weakref loop: %s%s:%u: bad return from bfd_install_relocation: %x%u-byte relocation cannot be applied to %u-byte field'%.*s' instruction not at start of execute packet'%.*s' instruction not in a software pipelined loop'%.*s' instruction not supported on this architecture'%.*s' instruction not supported on this functional unit'%.*s' instruction not supported on this functional unit for this architecture'%s' is not repeatable. Resulting behavior is undefined.'%s' is only available in DD2.0 or higher.'%s' may not be bundled with other instructions.'%s': only the NOP instruction can be issued in parallel on the m32r')' required',' expected'APSR', 'CPSR' or 'SPSR' expected'ASR' required'LSL' or 'ASR' required'LSL' required'MFC_RdTagMask' (channel 12) is only available in DD2.0 or higher.'SPU_RdEventMask' (channel 11) is only available in DD2.0 or higher.'[' expected'[' expected after PLD mnemonic'[' expected after PLI mnemonic']' expected'd.%s' must be 8-byte aligned'entry_num' must be absolute number in [0,31]'||' after predicate'||' not followed by instruction'||^' without previous SPMASK'}' expected at end of 'option' field(PC)+ unpredictable(plt) is only valid on branch targets(unknown reason)*-%s conflicts with the other architecture options, which imply -%s-(PC) unpredictable-- unterminated string--abi=[32|64] set size of expanded SHmedia operands and object file type --shcompact-const-crange emit code-range descriptors for constants in SHcompact code sections --no-mix disallow SHmedia code in the same section as constants and SHcompact code --no-expand do not expand MOVI, PT, PTA or PTB instructions --expand-pt32 with -abi=64, expand PT, PTA and PTB instructions to 32 bits only --absolute-literals option not supported in this Xtensa configuration--density option is ignored--fdpic generate an FDPIC object file --generics is deprecated; use --transform instead--gstabs is not supported for ia64--hash-size needs a numeric argument--isa=[shmedia set as the default instruction set for SH64 | SHmedia | shcompact | SHcompact] --no-density option is ignored--no-generics is deprecated; use --no-transform instead--no-relax is deprecated; use --no-transform instead--no-underscore is invalid with a.out format--nops needs a numeric argument--pic is invalid for this object format--relax is deprecated; use --transform instead-32 create 32 bit object file -64 create 64 bit object file -32 create o32 ABI object file (default) -n32 create n32 ABI object file -64 create 64 ABI object file -64 is supported for ELF format only-EL generate code for a little endian machine -EB generate code for a big endian machine --little-endian-data generate code for a machine having big endian instructions and little endian data. -G may not be used in position-independent code-G may not be used with SVR4 PIC code-G n Put data <= n bytes in the small data area -G not supported in this configuration.-KPIC generate PIC -V print assembler version number -undeclared-regs ignore application global register usage without appropriate .register directive (default) -no-undeclared-regs force error on application global register usage without appropriate .register directive -q ignored -Qy, -Qn ignored -s ignored -KPIC, -call_shared generate SVR4 position independent code -call_nonpic generate non-PIC code that can operate with DSOs -mvxworks-pic generate VxWorks position independent code -non_shared do not generate code that can operate with DSOs -xgot assume a 32 bit GOT -mpdr, -mno-pdr enable/disable creation of .pdr sections -mshared, -mno-shared disable/enable .cpload optimization for position dependent (non shared) code -mabi=ABI create ABI conformant object file for: -R option not supported on this target.-TSO use Total Store Ordering -PSO use Partial Store Ordering -RMO use Relaxed Memory Ordering -call_nonpic is supported only for ELF format-call_shared is supported only for ELF format-expand-pt32 invalid together with -no-expand-expand-pt32 only valid with -abi=64-k generate PIC -l use 1 word for refs to undefined symbols [default 2] -pic, -k generate position independent code -S turn jbsr into jsr --pcrel never turn PC-relative branches into absolute jumps --register-prefix-optional recognize register names without prefix character --bitwise-or do not treat `|' as a comment character --base-size-default-16 base reg without size is 16 bits --base-size-default-32 base reg without size is 32 bits (default) --disp-size-default-16 displacement with unknown size is 16 bits --disp-size-default-32 displacement with unknown size is 32 bits (default) -mCPU equivalent to -march=CPU -mtune=CPU. Deprecated. -no-mCPU don't generate code specific to CPU. For -mCPU and -no-mCPU, CPU must be one of: -mPIC Mark generated file as using large position independent code -m[no-]%-16s enable/disable%s architecture extension -mabi is supported for ELF format only-maltivec generate code for AltiVec -mvsx generate code for Vector-Scalar (VSX) instructions -me300 generate code for PowerPC e300 family -me500, -me500x2 generate code for Motorola e500 core complex -me500mc, generate code for Freescale e500mc core complex -me500mc64, generate code for Freescale e500mc64 core complex -mspe generate code for Motorola SPE instructions -mtitan generate code for AppliedMicro Titan core complex -mregnames Allow symbolic names for registers -mno-regnames Do not allow symbolic names for registers -march=%s is not compatible with the selected ABI-march= set architecture -mcpu= set cpu [default %s] -mcpu= Specify the CPU version -mcpu={fr500|fr550|fr400|fr405|fr450|fr300|frv|simple|tomcat} -mdouble Mark generated file as using double precision FP insns -mdsp generate DSP instructions -mno-dsp do not generate DSP instructions -mdspr2 generate DSP R2 instructions -mno-dspr2 do not generate DSP R2 instructions -mdword Mark generated file as using a 8-byte stack alignment -me Redirect errors to a file -merrors-to-file -mfar-mode | -mf Use extended addressing -mfdpic Assemble for the FDPIC ABI -mfix-loongson2f-jump work around Loongson2F JUMP instructions -mfix-loongson2f-nop work around Loongson2F NOP errata -mfix-vr4120 work around certain VR4120 errata -mfix-vr4130 work around VR4130 mflo/mfhi errata -mfix-24k insert a nop after ERET and DERET instructions -mfix-cn63xxp1 work around CN63XXP1 PREF errata -mgp32 use 32-bit GPRs, regardless of the chosen ISA -mfp32 use 32-bit FPRs, regardless of the chosen ISA -msym32 assume all symbols have 32-bit values -O0 remove unneeded NOPs, do not swap branches -O remove unneeded NOPs and swap branches --trap, --no-break trap exception on div by 0 and mult overflow --break, --no-trap break exception on div by 0 and mult overflow -mfp32 used with -mdmx-mfp32 used with -mips3d-mfp32 used with a 64-bit ABI-mfp64 used with a 32-bit ABI-mfp64 used with a 32-bit fpu-mfpr-32 Mark generated file as only using 32 FPRs -mfpr-64 Mark generated file as using all 64 FPRs -mgp32 used with a 64-bit ABI-mgp64 used with a 32-bit ABI-mgp64 used with a 32-bit processor-mgpr-32 Mark generated file as only using 32 GPRs -mgpr-64 Mark generated file as using all 64 GPRs -mhard-float allow floating-point instructions -msoft-float do not allow floating-point instructions -msingle-float only allow 32-bit floating-point operations -mdouble-float allow 32-bit and 64-bit floating-point operations --[no-]construct-floats [dis]allow floating point values to be constructed -mips1 generate MIPS ISA I instructions -mips2 generate MIPS ISA II instructions -mips3 generate MIPS ISA III instructions -mips4 generate MIPS ISA IV instructions -mips5 generate MIPS ISA V instructions -mips32 generate MIPS32 ISA instructions -mips32r2 generate MIPS32 release 2 ISA instructions -mips64 generate MIPS64 ISA instructions -mips64r2 generate MIPS64 release 2 ISA instructions -march=CPU/-mtune=CPU generate code/schedule for CPU, where CPU is one of: -mips16 generate mips16 instructions -no-mips16 do not generate mips16 instructions -mips16 cannot be used with -micromips-mlibrary-pic Mark generated file as using position indepedent code for libraries -mmcu generate MCU instructions -mno-mcu do not generate MCU instructions -mmedia Mark generated file as using media insns -mmicromips generate microMIPS instructions -mno-micromips do not generate microMIPS instructions -mmicromips cannot be used with -mips16-mmt generate MT instructions -mno-mt do not generate MT instructions -mmuladd Mark generated file as using multiply add/subtract insns -mno-dword Mark generated file as using a 4-byte stack alignment -mno-pack Do not allow instructions to be packed -mnopic Disable -mpic, -mPIC, -mlibrary-pic and -mfdpic -mpack Allow instructions to be packed -mpic Mark generated file as using small position independent code -mppc64, -m620 generate code for PowerPC 620/625/630 -mppc64bridge generate code for PowerPC 64, including bridge insns -mbooke generate code for 32-bit PowerPC BookE -ma2 generate code for A2 architecture -mpower4, -mpwr4 generate code for Power4 architecture -mpower5, -mpwr5, -mpwr5x generate code for Power5 architecture -mpower6, -mpwr6 generate code for Power6 architecture -mpower7, -mpwr7 generate code for Power7 architecture -mcell generate code for Cell Broadband Engine architecture -mcom generate code Power/PowerPC common instructions -many generate code for any architecture (PWR/PWRX/PPC) -mrelocatable support for GCC's -mrelocatble option -mrelocatable-lib support for GCC's -mrelocatble-lib option -memb set PPC_EMB bit in ELF flags -mlittle, -mlittle-endian, -le generate code for a little endian machine -mbig, -mbig-endian, -be generate code for a big endian machine -msolaris generate code for Solaris -mno-solaris do not generate code for Solaris -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags -V print assembler version number -Qy, -Qn ignored -msmartmips generate smartmips instructions -mno-smartmips do not generate smartmips instructions -msoft-float Mark generated file as using software FP -mtomcat-debug Debug tomcat workarounds -mtomcat-stats Print out stats for tomcat workarounds -n32 is supported for ELF format only-no-expand only valid with SHcompact or SHmedia-no-mix is invalid without specifying SHcompact or SHmedia-non_shared is supported only for ELF format-nops=count when aligning, more than COUNT nops uses a branch -shcompact-const-crange is invalid without SHcompact.%s outside of %s....COMMon length (%d.) < 0! Ignored..COMMon length (%ld.) <0! Ignored..COMMon length (%lu) out of range ignored.EQU must use a label.EXIT must appear within a procedure.REG expression must be a register.REG must use a label.SCOMMon length (%ld.) <0! Ignored..abort detected. Abandoning ship..arch requires a matching --march=... option.begin [no-]density is ignored.begin directive with no matching .end directive.begin directive without a preceding .ent directive.begin directive without a preceding .file directive.begin literal is deprecated; use .literal instead.begin/.bend in different segments.bend directive names unknown symbol.bend directive without a preceding .ent directive.bend directive without a preceding .file directive.bss size %d < 0!.bss size %ld < 0!.bss size argument missing .callinfo is not within a procedure definition.cfi_endproc without corresponding .cfi_startproc.cfi_lsda requires encoding and symbol arguments.cfi_personality requires encoding and symbol arguments.compiler directive missing language and version.compiler directive missing version.cpload not in noreorder section.def pseudo-op used inside of .def/.endef: ignored..def pseudo-op used inside of .def/.endef; ignored.dim pseudo-op used outside of .def/.endef: ignored..dim pseudo-op used outside of .def/.endef; ignored.ef with no preceding .function.end [no-]density is ignored.end directive has no name.end directive missing or unknown symbol.end directive names different symbol than .ent.end directive names unknown symbol.end directive without a preceding .ent directive.end directive without a preceding .ent directive..end directive without a preceding .file directive.end directive without matching .ent.end not in text section.end symbol does not match .ent symbol..end%c encountered without preceding %s.end%s without preceding .%s.endef pseudo-op used before .def; ignored.endef pseudo-op used outside of .def/.endef: ignored..endfunc missing for previous .func.endfunc missing for previous .proc.ent directive has no name.ent directive has no symbol.ent directive without matching .end.ent or .aent not in text section..err encountered.error directive invoked in source file.es without preceding .bs.fail %ld encountered.field count '%d' out of range (1 <= X <= 32).fill size clamped to %d.fmask outside of .ent.fnend directive without .fnstart.frame outside of .ent.handler directive has no name.ifeqs syntax error.incbin count zero, ignoring `%s'.inst.n operand too big. Use .inst.w instead.largecomm supported only in 64bit mode, producing .comm.linkonce is not supported for this object file format.literal not allowed inside .begin literal region.literal_position inside literal directive; ignoring.ln pseudo-op inside .def/.endef: ignored..loc before .file.loc outside of .text.loc pseudo-op inside .def/.endef: ignored..longcall pseudo-op seen when not relaxing.longjump pseudo-op seen when not relaxing.ltorg in section %s paired to .using in section %s.ltorg without prior .using in section %s.machine stack overflow.machine stack underflow.mask outside of .ent.mask/.fmask outside of .ent.name directive has no symbol.name directive not in link (.link) section.option pic%d not supported.pdesc directive has no entry symbol.pdesc directive not in link (.link) section.pdesc doesn't match with last .ent.pdesc has a bad entry symbol.popsection without corresponding .pushsection; ignored.previous without corresponding .section; ignored.profiler pseudo requires at least two operands..prologue directive without a preceding .ent directive.prologue within prologue.ref outside .csect.sblock may be used for initialized sections only.scl pseudo-op used outside of .def/.endef ignored..scl pseudo-op used outside of .def/.endef; ignored.sect: subsection name ignored.set pop with no .set push.set syntax invalid .size expression for %s does not evaluate to a constant.size pseudo-op used outside of .def/.endef ignored..size pseudo-op used outside of .def/.endef; ignored.space or .fill with negative value, ignored.space repeat count is negative, ignored.space repeat count is zero, ignored.space specifies non-absolute value.space/.bes repeat count is negative, ignored.space/.bes repeat count is zero, ignored.stab%c is not supported.stab%c: description field '%x' too big, try a different debug format.stab%c: ignoring non-zero other field.stab%c: missing comma.stabx of storage class stsym must be within .bs/.es.syntax %s requires command-line option `--no-underscore'.syntax %s requires command-line option `--underscore'.tag pseudo-op used outside of .def/.endef ignored..tag pseudo-op used outside of .def/.endef; ignored.tag requires a structure tag.tag target '%s' undefined.tc not in .toc section.tc with no label.type pseudo-op used outside of .def/.endef ignored..type pseudo-op used outside of .def/.endef; ignored.unwind_save does not support this kind of register.usect: non-zero alignment flag ignored.usepv directive has no name.usepv directive has no type.uses does not refer to a local symbol in the same section.uses pseudo-op seen when not relaxing.uses target does not refer to a local symbol in the same section.using: base address expression illegal or too complex.val expression is too complex.val pseudo-op used outside of .def/.endef ignored..val pseudo-op used outside of .def/.endef; ignored.var may only be used within a macro definition.vframepsp is meaningless, assuming .vframesp was meant.vliw unavailable when VLIW is disabled..warning directive invoked in source file.word %s-%s+%s didn't fit.word case-table handling failed: table too large0x%lx out range of signed 32bit displacement0x%lx: "%s" type = %ld, class = %d, segment = %d 16-bit jump out of range3-bit immediate out of range32-bit conditional branch generated32bit mode not supported on `%s'.32bit x86_64 is only supported for ELF48-bit microMIPS instructions are not supported5-bit field must be absolute5-bit immediate too large6-bit displacement out of range6-bit immediate out of range62-bit relocation not yet implemented64bit mode not supported on `%s'.68040 and 68851 specified; mmu instructions may assemble incorrectly8 byte instruction in delay slot8 byte jump instruction with delay slot8-bit displacement out of range8-bit immediate out of range: PC-relative operand can't be a constant: TLS operand can't be a constant: There are only 32 f registers; [0-31]: There are only 32 single precision f registers; [0-31]: There are only 64 f registers; [0-63]: asr number must be between 0 and 31: asr number must be between 16 and 31: expecting %asrN: invalid ASI expression: invalid ASI name: invalid ASI number: invalid cpreg name: invalid membar mask expression: invalid membar mask name: invalid membar mask number: invalid prefetch function expression: invalid prefetch function name: invalid prefetch function number: invalid siam mode expression: invalid siam mode number: rd on write only ancillary state register: unrecognizable hyperprivileged register: unrecognizable privileged register: unrecognizable v9a ancillary state register: unrecognizable v9a or v9b ancillary state register:b not permitted; defaulting to :w:lower16: not allowed this instruction:upper16: not allowed instruction:upper16: not allowed this instruction assemble for floating point ABI assemble for architecture assemble for CPU assemble for FPU architecture ,X controls implicit insertion of IT instructions assemble for eabi version ? section flag ignored with G present@%s reloc is not supported with %d-bit output format@local or @plt branch destination is too far away, %ld bytes@tls may not be used with "%s" operands@tls may only be used in last operandA bignum/flonum may not be a displacement: 0x%lx usedA branch offset requires 0 MOD 4 alignmentA destination register must be suppliedA different %s was already specified, is now %sA parameter named `%s' already exists for macro `%s'A status register or status bit name is requiredAAARG -> unhandled constant relocADRL used for a symbol not defined in the same fileAR %d can only be accessed by %c-unitAR register not found in indirect referenceARM register expectedAVR Assembler options: -mmcu=[avr-name] select microcontroller variant [avr-name] can be: avr1 - classic AVR core without data RAM avr2 - classic AVR core with up to 8K program memory avr25 - classic AVR core with up to 8K program memory plus the MOVW instruction avr3 - classic AVR core with up to 64K program memory avr31 - classic AVR core with up to 128K program memory avr35 - classic AVR core with up to 64K program memory plus the MOVW instruction avr4 - enhanced AVR core with up to 8K program memory avr5 - enhanced AVR core with up to 64K program memory avr51 - enhanced AVR core with up to 128K program memory avr6 - enhanced AVR core with up to 256K program memory avrxmega3 - XMEGA, > 8K, <= 64K FLASH, > 64K RAM avrxmega4 - XMEGA, > 64K, <= 128K FLASH, <= 64K RAM avrxmega5 - XMEGA, > 64K, <= 128K FLASH, > 64K RAM avrxmega6 - XMEGA, > 128K, <= 256K FLASH, <= 64K RAM avrxmega7 - XMEGA, > 128K, <= 256K FLASH, > 64K RAM or immediate microcontroller name. Aborting because statement has "%s"Absolute PC-relative value in relaxation code. Assembler error.....Absolute value in relaxation code. Assembler error.....Accessing `%s' as thread-local objectAccessing function `%s' as thread-local objectAddend to unresolved symbol not on word boundary.Address mode *+ARx is not allowed in memory-mapped register addressing. Resulting behavior is undefined.Address mode *+ARx is write-only. Results of reading are undefined.Address of immediate operandAddressing mode not implemented yet.Adjusted signed .word (%ld) overflows: `switch'-statement too large.Alignment must be a power of 2Alignment negative: 0 assumedAlignment negative: 0 assumed.Alignment too large: %d assumedAlignment too large: %d. assumedAlignment too large: %d. assumed.Alpha options: -32addr treat addresses as 32-bit values -F lack floating point instructions support -mev4 | -mev45 | -mev5 | -mev56 | -mpca56 | -mev6 | -mev67 | -mev68 | -mall specify variant of Alpha architecture -m21064 | -m21066 | -m21164 | -m21164a | -m21164pc | -m21264 | -m21264a | -m21264b these variants include PALcode opcodes An IMM instruction should not be present in the .s fileAn instruction was expanded (%s)Architecture mismatch on "%s".Architecture variants are: Argument to .BLOCK/.BLOCKZ must be between 0 and 0x3fffffffArgument to .even ignoredAssembler does not yet support PICAssembler messages: Assertion failure at %s line %d. Assertion failure in %s at %s line %d. At least one PR argument expectedAt least two PR arguments expectedAttempt to purge non-existant macro `%s'Attempt to put a common symbol into set %sAttempt to put an undefined symbol into set %sAttempt to redefine register set `%s'Attribute name not recognised: %sAuto increment/decrement offset '%ld' is out of range.Auxiliary register AR0--AR7 required for indirectBALIGN immediate not 1 or 3 (%lu)BSPEC already active. Nesting is not supported.BSPEC without ESPEC.BSS length (%d) < 0 ignoredBSS length (%d.) <0! Ignored.BYTE expression not a pure numberBYTE expression not in the range 0..255Bad .fmask directiveBad .frame directiveBad .frame directive 1./2. paramBad .frame directive 3./4. paramBad .mask directiveBad .mask/.fmask directiveBad COFF version '%s'Bad CPU version '%s'Bad base register, using $%d.Bad call to MD_NTOF()Bad call to md_atof ()Bad call to md_atof () - floating point formats are not supportedBad char = '%c' Bad direct addressing construct %sBad displacement %d (require 0--255) Bad element selector %ldBad floating point constant: %sBad opcode table, broken assembler.Bad opcode-table-option, check in file ns32k-opcode.hBad operandBad operand for a load instruction: <%s>Bad operand for a store instruction: <%s>Bad operand value: %sBad parameter list for macro `%s'Bad register nameBad register name r%sBad register rangeBad relocation fixup type (%d)Bad relocation type: 0x%02xBad segment (should be absolute).Bad segment in expression.Bad sequence number: !%s!%sBad suffix after ':' use {b|w|d} Defaulting to dBad suffix, defaulting to dBad value (%s) for %sBadly formed address expressionBanked registers are not available with this architecture.Big number is too bigBignum not permitted in short literal. Immediate mode assumed.Bignum too big for %c format; truncatedBignum too big for longBit field out of rangeBit position for %s not in range 0..%lu (%lu)Both arguments must be substitution symbolsBoth the_insn.HI and the_insn.LO are set : %sBranch %s is always trueBranch out of rangeBranch to misaligned address (%lx)Branch to unaligned addressBroken assembler. No assembly attempted.Buggy opcode: `%s' "%s" C54x-specific command line options: CFI instruction used without previous .cfi_startprocCFI is not supported for this targetCFI state restore without previous rememberCPU version has already been setCRIS-specific options: C_EFCN symbol for %s out of scopeCalling gen_cond_branch_32 for .arch common_v10_v32 Can not do %d byte %srelocationCan not do %d byte pc-relative pic relocationCan not do %d byte pc-relative relocationCan not do %d byte pc-relative relocation for storage type %dCan not do %d byte pic relocationCan not do %d byte relocationCan not do %d byte relocation for storage type %dCan not represent %s relocation in this object file formatCan not set dlx_skip_hi16_flagCan't add stop bit to mark end of instruction groupCan't change spaces within a procedure definition. IgnoredCan't change subspaces within a procedure definition. IgnoredCan't deal with expression; defaulting to %ldCan't do flonum short literal: immediate mode used.Can't find opcode to match operandsCan't handle O_big in s390_exp_compareCan't hash %s: %sCan't hash `%s': %s Can't hash instruction '%s':%sCan't redirect stderr to the file '%s'Can't relax differenceCan't relocate expressionCan't set GP valueCan't set register masksCan't use floating point insn in this sectionCan't use long branches on this architectureCan't work out size of operand. Cannot allocate unwind descriptor Cannot assemble instructionCannot define export symbol: %s Cannot define static symbol: %s Cannot express %s%d%s relocationCannot find relocation type for symbol %s, code %dCannot generate relocation type for symbol %s, code %sCannot handle fixupCannot make %s relocation PC relativeCannot represent %s relocation in object fileCannot represent exponent in %d bitsCannot represent relocation type %sCannot use special register with this instructionCase value %ld unexpected at line %d of file "%s" Changing of CPU version on the fly not supportedChanging processor generation on fly not supported...Chose GP value of %lx Closing bracket missingCode for %s not in range 0..%lu (%lu)Comma and symbol expected for '.asg STRING, SYMBOL'Comma and symbol expected for '.eval EXPR, SYMBOL'Comma expectedComma expected Comma expected after section nameCommon alignment negative; 0 assumedCommon alignment not a power of 2Complex expression not supportedComplicated LAPC target operand is not a multiple of two. Use LAPC.DCondition "%s" does not match preceding groupCondition "%s" uses a different accumulator from a preceding conditionCondition <%c%c> in structured control directive can not be encoded correctlyCondition code register should be 0 or 4 for %s, was %dCondition code register should be even for %s, was %dConstant expression %d out of range, [%d, %d].Conversion of DBcc to absolute jumpConversion of PC relative BSR to absolute JSRConversion of PC relative branch to absolute jumpConversion of PC relative conditional branch to absolute jumpConversion of PC relative displacement to absoluteCoproccesor code > %u bits (%lu)Copyright 2011 Free Software Foundation, Inc. Could not set architecture and machineCould not set architecture and machine.Creating sections with .xdataN/.xrealN/.xstringZ is deprecated.Current section is unitialized, section name required for .clinkD register out of range for selected VFP versionD10V options: -O Optimize. Will do some operations in parallel. --gstabs-packing Pack adjacent short instructions together even when --gstabs is specified. On by default. --no-gstabs-packing If --gstabs is specified, do not pack adjacent instructions together. DSP immediate not in range %ld..%ld (%ld)DSP immediate not in range 0..%d (%lu)Dangerous simultaneous use of `f%d' and `f%d'Default target `%s' is not supported.Defective assembler. No assembly attempted.Delayed branches not available on SH1Deprecated syntax.Destination accumulator for each part of this parallel instruction must be differentDestination register must be ARnDestination register must be R0 or R1Destination register must be R2 or R3Difference of symbols in different sections is not supportedDirect value of %ld is not suitableDirective .atmp available only with -mintel-syntax optionDirective .dual available only with -mintel-syntax optionDirective .enddual available only with -mintel-syntax optionDirective invalid within a bundleDisplacement length %s ignored!Displacement too large for :dDisplacement value of %ld is too largeDivide by zero.Don't know how to figure width of %c in md_assemble()Don't know how to relocate plain operands of type %sDuplicate %s conditionalDuplicate equal sign (=) in instructionDuplicate predicate register ignoredEBCDIC constants are not supportedECOFF debugging is disabled.ENDLOOP without corresponding LOOPEPIPHANY specific command line options: ESPEC without preceding BSPECEmpty argument of .endpEmpty argument of .procEpilogue count of %lu exceeds number of nested prologues (%u)Equal parallell destination registers, one result will be discardedError %s in %s Error in argument %d. Expecting: "%s"Error in expressionError in relocation handlingError in statement syntaxError setting flags for "%s": %sError:Error: Even number required. Rounded to %dExecuting %s in IU in reverse serial may not workExecuting %s in IU may not workExecuting %s in IU may not work in parallel executionExecuting %s in reverse serial with %s may not workExpanded opcode after delayed branch: `%s'Expanded opcode in dual mode: `%s'Expected '('Expected ')'Expected ':'Expected '['Expected ']'Expected comma after common lengthExpected comma after nameExpected comma after name "%s"Expected comma after symbol-nameExpected comma after symbol-name: rest of line ignored.Expected immediate expressionExpected quoted stringExpected register, got '%s'.Expected separator `='Expected simple number.Expecting ']' found '%s'Expecting a constant valueExpecting a register nameExpecting a register.Expecting character constant argumentExpecting operand after ','Expecting operand after ','; got nothingExpecting operand before ','; got nothingExpecting register D for indexed indirect mode.Expecting second argumentExplicit stops are ignored in auto modeExpression Error for operand modifier %%hi/%%lo Expression out of rangeExpression out of range, using 0Expression too complexExpression too complex.Extended addressing not supported on the specified CPUExtra )Extra junk in function call, expecting ')'Extra junk on lineFATAL: Attaching compiler header %sFIRST not supported as a .SUBSPACE argumentFP branch in delay slotFP branch preceded by FP instruction; NOP insertedFPA .unwind_save does not take a register listFPA register expectedFRAME parameter must be a multiple of 8: %d FRV specific command line options: Failed to find real start of function: %s Fatal error: Field not properly aligned [%d] (%d).Field out of range [%d..%d] (%d).File '%s' not in macro archive formatFirst opcode is long. Unable to mix instructions as specified.First operand to .%s must be a predicateFirst operand to .%s not a registerFirst operand to .%s not a valid registerFirst operand to .altrp not a valid branch registerFirst operand to .fframe must be a constantFirst operand to .prologue must be a positive 4-bit constantFirst operand to .restore must be stack pointer (sp)First operand to .save not a registerFirst operand to .save not a valid registerFirst operand to .save.b must be a positive 5-bit constantFirst operand to .save.g must be a positive 4-bit constantFirst operand to .save.gf must be a non-negative 4-bit constantFirst operand to .unwabi must be a constantFirst operand to .vframe must be a general registerFix data dependency: %s %s -- %s %s (insert %d nop!/%d)Fix data dependency: %s %s -- %s %s (insert 1 pflush/%d)Fixup of %ld too large for field width of %dFloat AC not legal as integer operandFloat register should be even, was %dFloating point number not valid in expressionFloating point register in register listForced short literal to immediate mode. now_seg=%s to_seg=%sForcing byte displacementFound '{' after explicit switch to automatic modeFound '{' when already bundling.Found '{' when manual bundling is already turned onFound '}' when manual bundling is offFound '}' when not bundling.Found use of non-canonical register name %s; use %s instead.Function expects two argumentsGNU assembler %s GNU assembler version %s (%s) using BFD version %s GOT already in symbol tableGOT already in the symbol tableGOT bad expression with %s.GP prologue size exceeds field size, using 0 insteadGREG expression too complicatedGarbage at end of instruction: `%s'.Gas failure, reloc type #%i Gas failure, reloc type %s Gas failure, reloc value %d General register not legal as float operandGroup section `%s' has no group signatureHI/LO registers should be specified togetherHI/LO registers should be specified without additional registersHardware capability "%s" not enabled for "%s".Hashing returned "%s".I don't need or use temp. file "%s".I don't use an interpass file! -V ignoredI960 options: IA-64 options: --mconstant-gp mark output file as using the constant-GP model (sets ELF header flag EF_IA_64_CONS_GP) --mauto-pic mark output file as using the constant-GP model without function descriptors (sets ELF header flag EF_IA_64_NOFUNCDESC_CONS_GP) -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64) -mle | -mbe select little- or big-endian byte order (default -mle) -mtune=[itanium1|itanium2] tune for a specific CPU (default -mtune=itanium2) -munwind-check=[warning|error] unwind directive check (default -munwind-check=warning) -mhint.b=[ok|warning|error] hint.b check (default -mhint.b=error) -x | -xexplicit turn on dependency violation checking IP2K specific command line options: IT falling in the range of a previous IT blockIU instruction may not be in the left containerIgnoring attempt to re-define symbolIgnoring attempt to re-define symbol %sIgnoring attempt to re-define symbol `%s'.Ignoring attempt to spill beyond end of regionIgnoring changed section attributes for %sIgnoring statement due to "%s"Illegal %s number (%lu, 0x%lx)Illegal 19-bit code (%lu)Illegal 32 bit - processor register (`%s') in Instruction: `%s'Illegal AR register in indirect referenceIllegal Co-processor register in Instruction `%s' Illegal Co-processor special register in Instruction `%s' Illegal Scale - `%d'Illegal `cinv' parameter: `%c'Illegal `mask16' operand, operation is undefined - `%s'Illegal combination of relocation functionsIllegal index register pair (`%s') in Instruction: `%s'Illegal instruction or not implemented opcode.Illegal operand (arg %d)Illegal operand separator `%c'Illegal operand.Illegal operandsIllegal operands (whitespace): `%s'Illegal operands for %sIllegal operands%sIllegal operands: %%%s can be only used with call __tls_get_addrIllegal operands: %%%s cannot be used together with other relocs in the insn ()Illegal operands: %%%s requires arguments in ()Illegal operands: %%r_%s%d requires arguments in ()Illegal operands: %%r_plt in %d-byte data fieldIllegal operands: %%r_tls_dtpoff in %d-byte data fieldIllegal operands: Can't add non-constant expression to %%%s()Illegal operands: Can't do arithmetics involving %%%s() of a relocatable symbolIllegal operands: Can't do arithmetics other than + and - involving %%%s()Illegal operands: Only %%r_%s%d allowed in %d-byte data fieldsIllegal operands: garbage after %%r_%s%d()Illegal processor register (`%s') in Instruction: `%s'Illegal register (`%s') in Instruction: `%s'Illegal register `%s' in Instruction `%s'Illegal register `%s' in cop-register listIllegal register `%s' in cop-special-register listIllegal register `%s' in register listIllegal register `%s' in user register listIllegal register pair (`%s') in Instruction: `%s'Illegal register pair `%s' in Instruction `%s'Illegal section name `%s' (causes unwind section name clash)Illegal type of operand (arg %d)Imm4 isn't the first operandImmediate operand is not allowed for operand %d.Immediate value %ld too largeImmediate value not in 16 bit range: %ldImmediate value not in 16 bit signed range: %ldImmediate value not in 16 bit unsigned range: %ldImmediate value not in 4 bit unsigned range: %ldImmediate value not in 5 bit unsigned range: %ldImmediate value not in 6 bit range: %ldImmediate value not in 6 bit unsigned range: %ldImmediate value not in 8 bit range: %ldImmediate value not in 8 bit signed range: %ldImmediate value not in 8 bit unsigned range: %ldImmediate value of %ld is too largeImmediate value of %ld is too large for ldfImmediates %d and %d will give undefined behavior.Improper align amount (%ld), using low bitsImproper bit index (%lu)Improper extract size (%lu, position %lu)Improper immediate (%ld)Improper insert size (%lu, position %lu)Improper position (%lu)Improper rotate countImproper shift amount (%lu)Improper size (%lu)Incompatible first and second operands in instructionIncorrect fr_opcode value in frag. Internal error.....Incorrect number of operandsIncorrect number of operands givenIncrement/decrement value is out of range: `%ld'.Index can only be applied to rotating or indirect registersIndex must be a general registerIndex out of range 0..%uIndex register IR0,IR1 required for displacementIndexed indirect mode is not allowed for movb/movw.Indirect indexed addressing is not valid for 68HC11.Indirect register index must be a general registerInfinite loop encountered whilst attempting to compute the addresses of symbols in section %sInfinities are not supported by this target Initial .body should precede any instructionsInitial .prologue should precede any instructionsInserting "%s" into constant hash table failed: %sInserting "%s" into entry hint table failed: %sInserting "%s" into structure table failed: %sInstruction %s not allowed in a delay slot.Instruction %s requires absolute expressionInstruction %s: result is always falseInstruction %s: result is always trueInstruction '%s' requires an LP cpu versionInstruction '%s' requires far mode addressingInstruction `%s' is not recognized.Instruction does not fit in available delay slots (%d-word insn, %d slots left)Instruction does not fit in available delay slots (%d-word insn, %d slots left). Resulting behavior is undefined.Instruction does not support =N addressesInstruction formats for `%s':Instruction in R container is squashed by flow control instruction in L container.Instruction must be executed in parallelInstruction must be executed in parallel with another instruction.Instruction not supported by this architectureInstruction uses long version, so it cannot be mixed as specifiedInstructions do not use parallel execution pipelines.Instructions may not be executed in parallelInstructions share the same execution pipelineInstructions using long offset modifiers or absolute addresses are not repeatable. Resulting behavior is undefined.Instructions which cause PC discontinuity are not allowed in a delay slot. Resulting behavior is undefined.Intel K1OM is 64bit ELF onlyIntel K1OM is 64bit onlyIntel L1OM is 64bit ELF onlyIntel L1OM is 64bit onlyInternal Error: Can't allocate m68k_sorted_opcodes of size %dInternal Error: Can't hash %s: %sInternal Error: Can't find %s in hash tableInternal Error: Can't hash %s: %sInternal Error: bad instruction lengthInternal assembler error for instruction %sInternal assembler error for instruction format %sInternal assembler error for macro %sInternal bug. Try to use 0(r%d) instead of @r%dInternal consistency error. check ns32k-opcode.hInternal error found in md_convert_frag: offset %ld. Please report this.Internal error! Internal error, aborting at %s line %d Internal error, aborting at %s line %d in %s Internal error: Unable to find containing space for %s.Internal error: bad %s opcode (unknown extension operand type `+%c'): %s %sInternal error: bad microMIPS opcode (bits 0x%lx defined): %s %sInternal error: bad microMIPS opcode (bits 0x%lx undefined): %s %sInternal error: bad microMIPS opcode (incorrect length: %u): %s %sInternal error: bad microMIPS opcode (mask error): %s %sInternal error: bad microMIPS opcode (opcode/length mismatch): %s %sInternal error: bad microMIPS opcode (unknown extension operand type `m%c'): %s %sInternal error: bad microMIPS opcode (unknown operand type `%c'): %s %sInternal error: bad mips opcode (unknown extension operand type `%c%c'): %s %sInternal error: can't find opcode `%s' for `%s' Internal error: can't hash `%s': %s Internal error: don't know how to force %s to end of instruction groupInternal error: losing opcode: `%s' "%s" Internal logic error in iif.iifP[].typeInternal logic error in iif.iifP[n].typeInternal logic error. line %d, file "%s"Internal logic error. line %d, file "%s"Invalid --size-check= option: `%s'Invalid .CALL argument: %sInvalid .CALLINFO argument: %sInvalid .SPACE argumentInvalid .SUBSPACE argumentInvalid .insn format Invalid Add Condition: %sInvalid Add and Branch ConditionInvalid Branch On Bit Condition: %cInvalid COPR identifierInvalid CST4 operand value (arg %d)Invalid Compare and Branch ConditionInvalid Compare/Subtract ConditionInvalid Compare/Subtract Condition: %sInvalid DISPU4 operand value (arg %d)Invalid DataLabel expressionInvalid FP Compare Condition: %sInvalid FP Operand Format: %3sInvalid FTEST completer: %sInvalid Floating Point Operand Format.Invalid Indexed Load Completer Syntax.Invalid Indexed Load Completer.Invalid Logical Instruction Condition.Invalid MDMX Immediate (%ld)Invalid Nullification: (%c)Invalid PIC expression.Invalid Register in Register ListInvalid SFU identifierInvalid Shift/Extract/Deposit Condition.Invalid Short Load/Store Completer.Invalid Store Bytes Short CompleterInvalid Unit Instruction Condition.Invalid accumulator register.Invalid argument %d to .prologue.Invalid argument description: %dInvalid argument location: %s Invalid argument to --abi option: %sInvalid argument to --isa option: %sInvalid argument to .abi: %sInvalid argument to .mode: %sInvalid auxiliary register (use AR0-AR7)Invalid character %s before %s operandInvalid character %s in %s operandInvalid character %s in opcodeInvalid combination of instructions for bundle.Invalid combination: --abi=32 with --abi=64Invalid combination: --abi=64 with --abi=32Invalid combination: --abi=64 with --isa=SHcompactInvalid combination: --isa=SHcompact with --abi=64Invalid combination: --isa=SHcompact with --isa=SHmediaInvalid combination: --isa=SHmedia with --isa=SHcompactInvalid coprocessor 0 register numberInvalid coprocessor sub-selection value (0-7)Invalid default architecture, broken assembler.Invalid destination register for this instruction, use 'tfr'.Invalid destination register.Invalid displacement in indirect referenceInvalid dmad syntax '%s'Invalid dsp acc registerInvalid dsp/smartmips acc registerInvalid duplicate use of `%c%d'Invalid expression after # number Invalid expression after %%%% Invalid expression.Invalid field selector. Assuming F%%.Invalid field size, must be from 1 to 32Invalid floating point numberInvalid immediate write operand.Invalid indexed indirect mode.Invalid indexed register, expecting register X.Invalid indexed register, expecting register Y.Invalid indexed register.Invalid indirect addressing modeInvalid indirect addressing mode displacement %dInvalid instruction %sInvalid label '%s'Invalid left/right combination completerInvalid length (use 0 to %dInvalid mnemonic '%s'Invalid mode: %s Invalid numberInvalid opcode/operandsInvalid operand (s) for parallel instruction "%s"Invalid operand (use 1, 2, or 3)Invalid operand expressionInvalid operand for `%s'Invalid operand: immediate value used as address.Invalid operand: immediate value used as base address.Invalid operandsInvalid operands %sInvalid operands for %sInvalid operator for operand.Invalid or illegal addressing mode combined with scaled-indexInvalid pc-relative relocationInvalid performance register (%lu)Invalid permutation completerInvalid record type for P3 format.Invalid record type for format B1Invalid record type for format P6Invalid record type for format X1Invalid record type for format X3Invalid register for dbcc/tbcc instruction.Invalid register for post/pre increment.Invalid register for single precision fmpyadd or fmpysubInvalid register list for ldm/stm Invalid register number (%d)Invalid register number at '%.6s'Invalid register specification.Invalid register.Invalid register: 'r%d'Invalid register: r0 and r15 illegalInvalid relocationInvalid scaled-indexed mode, use (b,w,d,q)Invalid simultaneous use of `f%d' and `f%d'Invalid source register for this instruction, use 'tfr'.Invalid source register.Invalid status register "%s"Invalid subscript (use 1 to %d)Invalid suffix for literal pool entryInvalid syntax in External addressing modeInvalid syntax in Memory Relative addressing modeInvalid syntax in PC-relative addressing modeInvalid use of `%c%d' as output operandInvalid use of `r%d' as base update address operandInvalid use of parallelization operator.Invalid value for `%s' (%lu)Known MCU names:Known MCU names: LDP instruction needs a 24-bit operandLOC expression stepping backwards is not supportedLR and PC should not both be in register listLabel "$%d" redefinedLabel must be first in a bundleLabel required for .tagLeading plus sign not allowed in core modeLength of .comm "%s" is already %ld. Not changed to %d.Length of .comm "%s" is already %ld. Not changed to %ld.Length of .lcomm "%s" is already %ld. Not changed to %ld.Length of .scomm "%s" is already %ld. Not changed to %ld.Length specification ignored. Address mode 9F usedLine %d: unknown relocation type: 0x%x.Line numbers must be positive integers Literal Pool OverflowLocal symbol `%s' can't be equated to common symbol `%s'Long instructions may not be combined.Looks like a proc, but can't tell what kind. Low order bits truncated in immediate float operandLower code for %s not in range 0..%lu (%lu)M340 specific opcode used when assembling for M210MCORE specific options: -{no-}jsri2bsr {dis}able jsri to bsr transformation (def: dis) -{no-}sifilter {dis}able silicon filter behavior (def: dis) -cpu=[210|340] select CPU type -EB assemble for a big endian system (default) -EL assemble for a little endian system MIPS PIC call to register other than $25MIPS options: -EB generate big endian output -EL generate little endian output -g, -g2 do not remove unneeded NOPs or swap branches -G NUM allow referencing objects up to NUM bytes implicitly with the gp register [default 8] MN10200 options: none yet MN10300 assembler options: none yet MOVI operand is not a 32-bit signed value: 0x%8x%08xMRI style ORG pseudo-op not supportedMSP430 does not have %d registersMSP430 options: -mmcu=[msp430-name] select microcontroller type msp430x110 msp430x112 msp430x1101 msp430x1111 msp430x1121 msp430x1122 msp430x1132 msp430x122 msp430x123 msp430x1222 msp430x1232 msp430x133 msp430x135 msp430x1331 msp430x1351 msp430x147 msp430x148 msp430x149 msp430x155 msp430x156 msp430x157 msp430x167 msp430x168 msp430x169 msp430x1610 msp430x1611 msp430x1612 msp430x311 msp430x312 msp430x313 msp430x314 msp430x315 msp430x323 msp430x325 msp430x336 msp430x337 msp430x412 msp430x413 msp430x415 msp430x417 msp430xE423 msp430xE425 msp430E427 msp430xW423 msp430xW425 msp430W427 msp430xG437 msp430xG438 msp430G439 msp430x435 msp430x436 msp430x437 msp430x447 msp430x448 msp430x449 MT load high bit not 0 or 1 (%lu)MT specific command line options: MT usermode bit not 0 or 1 (%lu)MU instruction may not be in the right containerMacro %s not implemented yetMacro `%s' was already definedMacro instruction expanded into a wrong size instruction in a 16-bit branch delay slotMacro instruction expanded into a wrong size instruction in a 32-bit branch delay slotMacro instruction expanded into multiple instructionsMacro instruction expanded into multiple instructions in a branch delay slotMacro used $at after ".set noat"Maverick DSPSC register expectedMaverick MVAX register expectedMaverick MVD register expectedMaverick MVDX register expectedMaverick MVF register expectedMaverick MVFX register expectedMaximum %d bits may be set in `mask16' operandMeP specific command line options: -EB assemble for a big endian system -EL assemble for a little endian system (default) -mconfig= specify a chip configuration to use -maverage -mno-average -mmult -mno-mult -mdiv -mno-div -mbitops -mno-bitops -mleadz -mno-leadz -mabsdiff -mno-absdiff -mminmax -mno-minmax -mclip -mno-clip -msatur -mno-satur -mcop32 enable/disable the given opcodes If -mconfig is given, the other -m options modify it. Otherwise, if no -m options are given, all core opcodes are enabled; if any enabling -m options are given, only those are enabled; if only disabling -m options are given, only those are disabled. Memory mapped register "%s" out of rangeMisplaced .entry. Ignored.Missing '(' after substitution symbol functionMissing ')'Missing ')' in subscripted substitution symbol expressionMissing ','Missing '}' at end of fileMissing )Missing ) in ra(rb)Missing .EXIT for a .ENTRYMissing .callinfoMissing .callinfo for this procedureMissing .callinfo.Missing .endp after previous .procMissing .exit Missing .label_state %ldMissing .procend Missing Branch On Bit ConditionMissing `]' to close indexed-indirect mode.Missing `]' to close register indirect operand.Missing arguments for opcode <%s>.Missing forced substitution terminator ':'Missing function name for .PROCMissing function name for .PROC (corrupted label chain)Missing label name on .LABELMissing macro nameMissing matching brackets : `%s'Missing operandMissing operand.Missing or bad .using directiveMissing parameter qualifier for `%s' in macro `%s'Missing predicate relation typeMissing second register for indexed-indirect mode.Missing second register or offset for indexed-indirect mode.Missing section nameMissing size argumentMissing symbol name in directiveMissing value for required parameter `%s' of macro `%s'Mixing of normal and extended addressing not supportedMixing register syntax, with and without '$'.More than one AR register found in indirect referenceMore than one displacement found in indirect referenceMore than one relocation op per insnMotorola 68HC11/68HC12/68HCS12 options: -m68hc11 | -m68hc12 | -m68hcs12 specify the processor [default %s] -mshort use 16-bit int ABI (default) -mlong use 32-bit int ABI -mshort-double use 32-bit double ABI -mlong-double use 64-bit double ABI (default) --force-long-branches always turn relative branches into absolute ones -S,--short-branches do not turn relative branches into absolute ones when the offset is out of range --strict-direct-mode do not turn the direct mode into extended mode when the instruction does not support direct mode --print-insn-syntax print the syntax of instruction in case of error --print-opcodes print the list of instructions with syntax --generate-example generate an example of each instruction (used for testing) Must be in a space before changing or declaring subspaces. NS32K options: -m32032 | -m32532 select variant of NS32K architecture --disp-size-default=<1|2|4> NaNs are not supported by this target Name # Modes Min ops Max ops Modes mask # Used Nan, using zero.Need #1 or #2 hereNeither Power nor PowerPC opcodes were selected.Neon double or quad precision register expectedNeon quad precision register expectedNested proceduresNo !literal!%ld was foundNo !tlsgd!%ld was foundNo !tlsldm!%ld was foundNo 'bal' entry point for leafproc %sNo .ENTRY for this .EXITNo .cprestore pseudo-op used in PIC codeNo .frame pseudo-op used in PIC codeNo addend allowed in @fptr() relocationNo comma after .pdesc No compiled in support for %d bit object file formatNo compiled in support for 64 bit object file formatNo current frameNo instruction foundNo instruction or missing opcode.No known dwarf XCOFF section for flag 0x%08x No lda !gpdisp!%ld was foundNo ldah !gpdisp!%ld was foundNo memory for symbol name.No operatorNo previous section to return to. Directive ignored.No relocation operandNo segment info for current sectionNo such entry in list. (cpu/mmu register)No such opcodeNo symbol after .code_addressNo symbol after .linkageNon-PIC jump used in PIC libraryNon-absolute symbol: '%s'.Non-constant symbols not allowed Not a defined coldfire architectureNot a symbolic expressionNot enough operandsNot in a space. Not in a subspace. Number (0x%s) larger than 32 bitsNumber larger than 64 bitsNumber of elements must be positiveNumber too largeOPF immediate operand out of range (0-0x1ff)Odd numbered register used as target of multi-register instructionOffset not 16 bytes alignment (%ld)Offset not in range %ld..%ld (%ld)Offset on nested structures is ignoredOffset out of 16-bit range: %ld.Offset out of 5-bit range for movw/movb insn: %ldOffset out of 5-bit range for movw/movb insn: %ld.Offset too largeOne of these instructions may not be executed in parallel.Only constant offsets are supportedOnly constant space allocation is supportedOnly one .compiler pseudo-op per file!Only one .copyright pseudo-op per file!Only one .version pseudo-op per file!Only one comparison conditional allowedOnly one overflow conditional allowedOnly the first path encountering the conflict is reportedOpcode %s not available in this modeOpcode `%s' is not recognized.Opcode `%s' with these operand types not available in %s modeOpcode `%s' with these operand types not available in H8/300 modeOpcode `%s' with these operand types not available in H8/300H modeOpcode `%s' with these operand types not available in H8/300S modeOpcode not supported on this processor: %sOpcode(%d.%s): Operand "%s" out of range (use 1 or 2)Operand %d to .%s must be a constantOperand %d to .%s must be a preserved registerOperand %d to .%s must be a writable registerOperand %u of `%s' should be %sOperand '%s' out of range (%d <= x <= %d)Operand `%x' not recognized in fixup16.Operand `%x' not recognized in fixup8.Operand has odd displacement (arg %d)Operand mismatchOperand of .vframe contradicts .prologueOperand out of 16-bit range: `%ld'.Operand out of 8-bit range: `%ld'.Operand out of range (arg %d)Operand out of range for a relative branch: `%ld'Operand overflowOperand to .copy_state must be a constantOperand to .label_state must be a constantOperand to .save.f must be a positive 20-bit constantOperand to .spill must be a constantOperand to .vframesp must be a constant (sp-relative offset)Operand value is not within upper 64 KB (arg %d)Operands to .save.gf may not be both zeroOperator may only be applied to symbols.Option -b is depreciated, please use -mbigOption -p is depreciated, please use -mmemparmOption -r is depreciated, please use -mregparmOption -s is depreciated, please use -msmallOption `%s' is not recognized.Options: -a[sub-option...] turn on listings Sub-options [default hls]: c omit false conditionals d omit debugging directives g include general info h include high-level source l include assembly m include macro expansions n omit forms processing s include symbols =FILE list to FILE (must be last sub-option) Out of memory: could not allocate new space chain entry: %s Out of memory: could not allocate new subspace chain entry: %s Out-of-range .word offset handling is not implemented for .arch common_v10_v32Overflow in expression, truncated to 16 bitsOverflow in expression, truncated to 8 bitsPC not allowed in register listPC part of operand unpredictablePC relative MIPS16 instruction references a different sectionPC relative branch to label %s which is not in the instruction spacePC-relative offset not 4-byte-alignedPC-relative offset out of rangePC-relative relocation must be trivially resolvedPIC code offset overflow (max 16 signed bits)PIC code offset overflow (max 32 signed bits)PIC relocation size does not match operand sizePJ options: -little generate little endian code -big generate big endian code PTA operand is a SHcompact symbolPTB operand is a SHmedia symbolParallel opcode cannot contain more than two instructionsParameter named `%s' does not exist for macro `%s'Parameters of an existing subspace can't be modifiedParse failed.Perhaps you are missing %%tpoff()?Pipelined instruction: fsrc1 = fdestPlease report this bug. Please use --help to see usage and options for this assembler. Pointless default value for required parameter `%s' in macro `%s'Pointless use of p0 as first operand to .%sPointless use of zero first operand to .prologuePost-decrement mode is not valid for 68HC11.Post-increment mode is not valid for 68HC11.PowerPC options: -a32 generate ELF32/XCOFF32 -a64 generate ELF64/XCOFF64 -u ignored -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2) -mpwr generate code for POWER (RIOS1) -m601 generate code for PowerPC 601 -mppc, -mppc32, -m603, -m604 generate code for PowerPC 603/604 -m403 generate code for PowerPC 403 -m405 generate code for PowerPC 405 -m440 generate code for PowerPC 440 -m464 generate code for PowerPC 464 -m476 generate code for PowerPC 476 -m7400, -m7410, -m7450, -m7455 generate code for PowerPC 7400/7410/7450/7455 -m750cl generate code for PowerPC 750cl Pre-increment mode is not valid for 68HC11Predicate register expectedPredicate source and target requiredPrefix 'd.' invalid for instruction `%s'Premature end of suffix -- Defaulting to dPrevious .save incompleteProcessor variants are: Pseudodirective .file is only valid when generating ELFPseudodirective .loc is only valid when generating ELFQualifying predicate expectedRA register is saved twice.Radix `%s' unsupported or invalidRd and Rm should be different in mlaRd and Rm should be different in mulRedefining entrynum for sysproc %sRedefining leafproc %sRedundant `#' suffix operatorsReg not valid for H8/300Register must be R0--R7Register must be RnRegister must be address registerRegister must be ivtp or tvtpRegister name %s conflicts with symbol of the same nameRegister name expectedRegister number (R%ld) for double word access must be even.Register number must be EVENRegister number out of range 0..%uRegister symbol %s already defined.Register value annotation ignoredRegisters cannot be used as a prefix of indexed expression [%s]Registers cannot be used within absolute expression [%s]Registers cannot be used within immediate expression [%s]Relaxation should never occurRelaxation to long branches for .arch common_v10_v32 not implementedRelaxed out-of-range branch into a jumpReloc %d not supported by object file formatRelocatable values require at least WORD storageRelocation %d is not supported by object file format.Relocation %s is not safe for %sRelocation cannot be done when using -mrelocatableRelocation doesn't fit. (relocation value = 0x%lx)Report bugs to %s Reserved word `%s' used as parameter in macro `%s'Rn must not overlap other operandsRotating register index must be a non-negative constantS+core co-processor register expectedS+core register expectedS+core special-register expectedSH options: --little generate little endian code --big generate big endian code --relax alter jump instructions for long displacements --renesas disable optimization with section symbol for compatibility with Renesas assembler. --small align sections to 4 byte boundaries, not 16 --dsp enable sh-dsp insns, and disable floating-point ISAs. --allow-reg-prefix allow '$' as a register name prefix. --isa=[any use most appropriate isa | dsp same as '-dsp' | fpSHmedia code not allowed in same section as constants and SHcompact codeSMC is not permitted on this architectureSP and PC not permitted in .unwind_movsp directiveSP not allowed in register listSPARC options: SPU options: --apuasm emulate behaviour of apuasm SRS base register must be r13SSE instruction `%s' is usedSVC is not permitted on this architectureSYMBOL TABLE not implementedS^# may only read-accessS^# needs expressionSame src/dest register is used (`r%d'), result is undefinedSame src/dest register is used (`r%d'),result is undefinedScaled-indexed addressing mode combined with scaled-indexSecond operand of .save contradicts .prologueSecond operand to .%s not a constantSecond operand to .prologue must be a general registerSecond operand to .prologue must be the first of %d general registersSecond operand to .restore must be a constant >= 0Second operand to .save not a valid registerSecond operand to .save.b must be a general registerSecond operand to .save.b must be the first of %d general registersSecond operand to .save.g must be a general registerSecond operand to .save.g must be the first of %d general registersSecond operand to .save.gf must be a non-negative 20-bit constantSecond operand to .unwabi must be a constantSection switching in code is not supported.Semantics error. This type of operand can not be relocated, it must be an assembly-time constantShift value > 32. using Short literal overflow(%ld.), immediate mode assumed.Signed immediate value %ld too largeSize of frame exceeds maximum of 96 registersSize of rotating registers exceeds frame sizeSomething forgot to clean up Source and destination must be differentSource and destination register should not be equalSpurious `,' or bad indirect register addressing mode.Spurious operands; (%d operands/instruction max)Standalone `#' is illegalSubstitution symbols must begin with a letterSubtype %d is not recognized.Sunplus-v2-0-0-20060510 Support for 64-bit arithmetic not compiled in.Supported ARCH values are:Swapping instruction orderSymbol %s used as immediate operand in PIC mode.Symbol '%s' could not be created.Symbol `%s' can not be both weak and commonSymbol expectedSymbol missing Symbol missing for .set/.equSymbol used as immediate for shift instructionSymbol used as immediate value for msrset/msrclr instructionsSyntax in scaled-indexed mode, use [Rn:m] where n=[0..7] m={b,w,d,q}TLS relocation not allowed in FLIX bundleTLS relocation size does not match operand sizeTMS320C6000 options: TOC section size exceeds 64kTOKEN TRACE not implementedTag must come before qualifying predicate.Tag name expectedTags on unwind pseudo-ops aren't supported, yetTarget processor does not support this instruction.The ".%s" pseudo-op is not implemented The %s operand doesn't matchThe .BTEQU pseudo-op is not implemented.The .DEFINE pseudo-op is not implementedThe .ENTER pseudo-op is not supportedThe .LEAVE pseudo-op is not supportedThe .MACRO pseudo-op is not implementedThe 64 bit file format is used without esame instructions.The XCOFF file format does not support arbitrary sectionsThe `.abi %s' directive is not valid with this architectureThe `.mode %s' directive is not valid with this architectureThe option "--no-allow-flix" prohibits multi-slot flix.The trap id must be a constant.This architecture doesn't support atomic instructionThis architecture doesn't support mmuThis assembler does not support processor generation %ldThis assembler was configured for a target of `%s'. This immediate requires 0 MOD 16 alignmentThis immediate requires 0 MOD 2 alignmentThis immediate requires 0 MOD 4 alignmentThis immediate requires 0 MOD 8 alignmentThis instruction may be unpredictable if executed on M-profile cores with interrupts enabled.This is the location of the conflicting usageThis operand must be constant at assembly timeThis operator only produces two byte values.This program is free software; you may redistribute it under the terms of the GNU General Public License version 3 or later. This program has absolutely no warranty. Thumb does not support NOP with hintsThumb does not support conditional executionThumb does not support negative register indexingThumb does not support register indexing with writebackThumb does not support register post-indexingThumb does not support the 2-argument form of this instructionThumb does not support this addressing modeThumb encoding does not support an immediate hereThumb encoding does not support rotationThumb load/store multiple does not support {reglist}^Thumb supports only LSL in shifted register indexingThumb-2 MUL must not set flagsThumb-2 instruction only valid in unified syntaxThumb2 branch out of rangeToo few operands to '%s'.Too many instructions for bundle.Too many operandsToo many operands passed to instructionToo many operands scannedToo many operands: %sTrap code (%lu) for %s not in 0..15 rangeTrap id `%ld' is out of range.Trap id must be within [0x30..0x39] or [0x40..0xff].Treating '%-*s' as a symbol.Tried to .set unrecognized mode `%s'Tried to convert PC relative branch to absolute jumpTried to set unrecognized symbol: %s Trying to 'bal' to %sTwo IU instructions may not be executed in parallelTwo MU instructions may not be executed in parallelTwo instructions in the same bundle both write to register %s, which is not allowed.Unable to allocate memory for new instructions Unable to determine default target processor from string: %sUnable to handle reference to symbol %sUnable to mix instructions as specifiedUnable to produce reloc against symbol '%s'Unable to resolve expressionUnary operator %c ignored because bad operand followsUnbalanced parenthesis in %s operand.Unbalanced parenthesis in operand %dUndefined .EXPORT/.IMPORT argument (ignored): %sUndefined absolute constant: '%s'.Undefined register: '%s'.Undefined space: '%s' Assuming space number = 0.Undefined substitution symbol '%s'Unexpected branch conversion with `%x'Unexpected character '%c' after operand %d to %s.Unexpected reference to a symbol in a non-code sectionUnexpected return value [%d] from parse_toc_entry! Unhandled dependency %s for %s (%s), note %dUnimplemented register `%s' specifiedUnimplemented toc32 expression modifierUnimplemented toc64 expression modifierUnknown .syntax operandUnknown CPU identifier `%s'Unknown TMS320C30 instruction: %sUnknown cpu -mcpu=%sUnknown default cpu = %s, os = %sUnknown exception: `%s'Unknown indirect addressing modeUnknown instruction '%s'Unknown opcode `%.*s'.Unknown opcode `%s'Unknown opcode `%s'.Unknown opcode: `%s'Unknown operatorUnknown processor register (32 bit) : `%d'Unknown processor register : `%d'Unknown psr option `%s'Unknown register pair - index relative mode: `%d'Unknown register pair: `%d'Unknown register: `%d'Unknown reloc in md_apply_fix: %sUnknown relocation encountered in md_apply_fix.Unknown relocation operand: !%sUnknown segment typeUnknown temporary pseudo registerUnknown/unsupported address literal typeUnmatched high relocationUnmatched high/shigh relocUnrecognised option: -hiddenUnrecognized %u-bit version of microMIPS opcodeUnrecognized .LEVEL argument Unrecognized .type argumentUnrecognized condition code "%s"Unrecognized dependency specifier %d Unrecognized field type '%c'Unrecognized fix-up (0x%08lx)Unrecognized indirect address format "%s"Unrecognized instruction "%s"Unrecognized opcodeUnrecognized opcode format: `%s'Unrecognized opcode: `%s'Unrecognized operand list '%s' for instruction '%s'Unrecognized option "%s"Unrecognized option '-x%s'Unrecognized option following -KUnrecognized or unsupported floating point constantUnrecognized parallel instruction "%s"Unrecognized parallel instruction '%s'Unrecognized parallel instruction combination "%s || %s"Unrecognized predicate relation typeUnrecognized register name `%s'Unrecognized section '%s'Unrecognized status bit "%s"Unrecognized struct/union tag '%s'Unrecognized substitution symbol functionUnrecognized symbol suffixUnrecognized version '%s'Unsigned immediate value %ld too largeUnsupported MIPS relocation number %dUnsupported fixup size %dUnsupported instruction set extension: %sUnsupported large constantUnsupported processor generation %dUnsupported relocation size %dUnsupported section attribute -- 'a'Unsupported use of %sUnsupported use of .gpdwordUnsupported use of .gpwordUnsupported use of spUnterminated string after absolute expressionUnwind directive not followed by an instruction.Usage: %s [option...] [asmfile...] Use of .def/.ref is deprecated. Use .global insteadUse of PC here is UNPREDICTABLEUse of PC here is deprecatedUse of p0 is not valid in this contextUse of r%u as a source register is deprecated when r%u is the destination register.Use the .mmregs directive to use memory-mapped register names such as '%s'Used $%u with ".set at=$%u"Used $at without ".set noat"Used more than the available 48 rotating registersUsed more than the available 96 rotating registersUsed more than the declared %d rotating registersUsing ENTRY rather than CODE in export directive for %sUsing a constant as second operand to .prologue is deprecatedUsing old style, %%hi(expr), please change to PPC style, expr@h.Using old style, %%lo(expr), please change to PPC style, expr@l.Using temp register(r1)VAX options: -d LENGTH ignored -J ignored -S ignored -t FILE ignored -T ignored -V ignored VFP registers must be adjacentVFP single or double precision register expectedVFP single precision register expectedVFP single, double or Neon quad precision register expectedVFP system register expectedVFP/Neon double precision register expectedVIP_BEGIN error:%sVLIW packing constraint violationVLIW packing used for -mno-packVMS options: -+ encode (don't truncate) names longer than 64 characters -H show new symbol after hash truncation -replace/-noreplace enable or disable the optimization of procedure calls VMS options: -+ hash encode names longer than 31 characters -1 `const' handling compatible with gcc 1.x -H show new symbol after hash truncation -h NUM don't hash mixed-case names, and adjust case: 0 = upper, 2 = lower, 3 = preserve case -v"VERSION" code being assembled was produced by compiler "VERSION" Value %d doesn't fit in signed %d-bit fieldValue %d doesn't fit in unsigned %d-bit fieldValue %ld too large for 8-bit PC-relative branch.Value for ENTRY_FR must be in the range 12..21 Value for ENTRY_GR must be in the range 3..18 Value for ENTRY_SR must be 3 Value for parameter `%s' of macro `%s' was already specifiedValue not in 16 bit range: %ldValue not in 16 bit signed range: %ldValue not in 4 bit unsigned range: %ldValue not in 5 bit unsigned range: %ldValue not in 6 bit range: %ldValue not in 6 bit unsigned range: %ldValue not in 8 bit range: %ldValue not in 8 bit signed range: %ldValue out of 16-bit range.Value truncated to 62 bitsVariable is accessed using small data read only anchor, but it is not in the small data read only sectionVariable is accessed using small data read write anchor, but it is not in the small data read write sectionVery short instr to option, ie you can't do it on a NULLstrVirtual memory exhaustedWarning:Warning: Warning: conditional outside an IT block for Thumb.Warning: duplicated register (r%d) in register listWarning: internal error: forgetting to set endndx of %sWarning: register range not in ascending orderWrites to register '%s' are not allowed.Wrong displacement %dWrong number of input operandsWrong number of operandsWrong number of output operandsWrong numbers of operands in default, check ns32k-opcodes.hWrong register in floating-point reglistWrong register in register indirect mode.Wrong size instruction in a %u-bit branch delay slotWrong size pointer register for architecture.XScale accumulator register expectedXtensa absolute literals option not supported; ignored[0-9]H labels do not mix with dot-pseudos[0-9]H labels may not appear alone on a line[PC] index banned[]index same as ()+register: unpredictable[]index same as -()register: unpredictable[no-]generics is deprecated; use [no-]transform instead[no-]relax is deprecated; use [no-]transform instead[tocv] symbol is not a toc symbol`%s%s' not allowed with `%s%c'`%s' Illegal count-register combination.`%s' Illegal use of register.`%s' Illegal use of registers.`%s' can't be equated to common symbol '%s'`%s' can't go in %s of %s template`%s' cannot be predicated`%s' does not fit into %s template`%s' does not fit into bundle`%s' has undefined result`%s' is already the alias of %s `%s'`%s' is deprecated, use `%s'`%s' is not a valid %s expression`%s' is not a valid %s-bit %s expression`%s' is not a valid parameter qualifier for `%s' in macro `%s'`%s' is not supported in 64-bit mode`%s' is not supported on `%s%s'`%s' is not supported on `%s'`%s' is not valid here (expected `%c%s%s%c')`%s' is only supported in 64-bit mode`%s' must be last in bundle`%s' must be last in instruction group`%s' operand %d must use `%ses' segment`%s' should be an operand to this .endp`%s' symbol without preceding function`%s' was already defined`%s' was already used as parameter (or another local) name`%s' was not defined within procedure`%s' was not specified with previous .proc`&' serial number operator is not supported`)' required`,' required`.abi 32' but command-line options do not specify 32-bit ABI`.abi 64' but command-line options do not specify 64-bit ABI`af' must appear alone`micromips' cannot be used with `mips16'`mips16' cannot be used with `micromips'`noreorder' must be set before `nomacro'a bignum with underscores may not have more than 8 hex digits in any worda bignum with underscores must have exactly 4 wordsa register has no addressa reloc on this operand implies an overflowabsolute expression requiredabsolute sections are not supportedaddend used with $DSBT_INDEXaddress offset must be half word alignmentaddress offset must be word alignmentaddress prohibits #address prohibits ()address prohibits ()+address prohibits -()address prohibits @address prohibits []address prohibits displacement length specifieraddress prohibits registeraddress too high for vector table jmp/jsraddressing mode not supportedalias = %s alignment is not a positive numberalignment is not a power of 2alignment must be constantalignment negative. 0 assumed.alignment negative; 0 assumedalignment not a power of 2alignment padding (%lu bytes) not a multiple of %ldalignment too large: %d assumedalignment too large: %u assumedalignment too large; %d assumedalignment too large; assuming %dalignment too large; assuming %ldalignments greater than %d bytes not supported in .text sections.already assembled instructionsambiguous flags combination - '.profiler' directive ignored.ambiguous memory operand size for `%s`ambiguous operand size for `%s'architectural extension `%s' is not allowed for the current base architecturearchitectural extensions must be specified in alphabetical orderarchitecture `%s' unrecognizedarchitecture bumped from "%s" to "%s" on "%s"architecture features both enabled and disabledarchitecture of opcode conflicts with that of earlier instruction(s)arg/static registers overlapassemble Thumb codeassemble for big-endianassemble for little-endianassembly state not set for first frag in section %sassuming all members of group `%s' are COMDATassuming symbol alignment of zeroat most %d displacement operands are allowedat most %d immediate operands are allowedattaching copyright header %s: %sattaching version header %s: %sattempt to .org/.space backwards? (%ld)attempt to .space/.bes backwards? (%ld)attempt to allocate data in absolute sectionattempt to allocate data in common sectionattempt to branch into different segmentattempt to get value of unresolved symbol `%s'attempt to move .org backwardsattempt to override symbol: %sattempt to re-define symbol `%s'attempt to redefine `%s' with a different lengthattempt to redefine pseudo-op `%s' ignoredattempt to redefine symbolattempt to redefine typed aliasattempt to store value in absolute sectionattempt to use an ARM instruction on a Thumb-only processor -- `%s'backward ref to unknown label "%d:"bad .common segment %sbad .fmask directivebad .frame directivebad .longcall formatbad .mask directivebad .relax formatbad .reserve segment -- expected BSS segmentbad .section directive: want a,l,w,x,M,S,G,T in stringbad .section directive: want a,o,s,w,x,M,S,G,T in stringbad .section directive: want a,s,w,x,M,S,G,T in stringbad .section directive: want a,v,w,x,M,S in stringbad .section directive: want a,w,x,M,S,G,T in stringbad .uses formatbad .weakext directivebad COFF debugging informationbad alignmentbad alignment of %d bytes in literal poolbad argument to sse_check directive.bad argument to syntax directive.bad arguments to instructionbad barrier typebad base register: must be r0bad bitmask specified after APSRbad byte vector index (%ld)bad call to MD_ATOF()bad call to md_atofbad combined pmuls output operandbad coprocessor idbad defsym; format is --defsym name=valuebad escaped character in stringbad expressionbad expression syntaxbad floating literal: %sbad floating-point constant: exponent overflowbad floating-point constant: unknown error code=%dbad format for ifc or ifncbad format of OPT NEST=depthbad frag at %p : fix %ld addr %ld %ld bad functional unit for operand %u of '%.*s'bad immediate value for 8-bit offset (%ld)bad immediate value for offset (%ld)bad instruction `%s'bad instruction formatbad instruction syntaxbad intruction syntaxbad list lengthbad list length for table lookupbad list type for instructionbad literal size bad memory operand `%s'bad number of operands to '%.*s'bad offset 0x%08lX (must be an 8-bit number of words)bad offset 0x%08lX (must be word-aligned)bad offset 0x%08lX (only 12 bits available for the magnitude)bad offset 0x%08lX (only 8 bits available for the magnitude)bad offset expression syntaxbad opcode or operandsbad operand %u of '%.*s'bad operand combination for '%.*s'bad or irreducible absolute expressionbad or irreducible absolute expression; zero assumedbad or missing co-processor numberbad or unhandled relocation type: 0x%02xbad personality routine numberbad predicate '%s'bad range in register listbad register expressionbad register for mrsbad register for operand %u of '%.*s'bad register for post-indexbad register in []bad register listbad register list: %sbad register name `%s'bad register name: %sbad register number: %sbad register or register pair for operand %u of '%.*s'bad register pair for operand %u of '%.*s'bad register rangebad relaxation statebad reloc expressionbad relocation expression for '%s'bad relocation fixup type (%d)bad relocation type: 0x%02xbad segmentbad size %d in type specifierbad starting register: r0 and r15 invalidbad string constantbad symbol suffixbad type for registerbad type for scalarbad type in Neon instructionbad/missing psr specifierbadly formed .dim directivebadly formed .dim directive ignoredbadly formed .size directivebadly formed .weak directive ignoredbase register expectedbase register specified but zerobase register written back, and overlaps second transfer registerbfd-target = %s bfd_set_section_flags: %sbig endian mode is not supportedbignum invalidbignum invalid; zero assumedbignum truncated to %d bytesbit-field extends past end of registerblx to '%s' an ARM ISA state function changed to blblx to Thumb func '%s' from Thumb ISA state changed to blboth insns for !gpdisp!%ld must be in the same sectionbr_gr record before region record!br_mem record before region record!bra or bsr with undefined symbol.branch address range overflow (0x%lx)branch must be last instruction in IT blockbranch operand has odd offset (%lx) branch out of rangebranch prediction invalid on this opcodebranch target frequency must be greater than 0branch to misaligned address (0x%lx)branching or jumping to a loop end may trigger hardware erratabreak outside of structured loopbyte displacement out of rangebyte or halfword not valid for base registercall to md_convert_frag call to md_convert_frag call to md_estimate_size_before_relax call to md_estimate_size_before_relax call to tc_aout_fix_to_chars call/jmp target out of range (1)call/jmp target out of range (2)can not do %d byte pc-relative relocationcan not do %d byte relocationcan not resolve expressioncan only load two consecutive registerscan only store two consecutive registerscan only transfer two consecutive registerscan't []index a register, because it has no addresscan't change index for operandcan't close %s: %scan't close `%s'can't create %s: %scan't create group: %scan't create section %scan't encode register '%s%s' in an instruction requiring REX prefix.can't extend fragcan't extend frag %u charscan't find fixup pointed to by .usescan't find opcodecan't find opcode can't find previous opcode can't handle expressioncan't handle generation of literal/labels yetcan't handle non absolute segment in `%s'can't handle undefined OP TYPEcan't have relocation for ipushcan't make global register symbol `%s'can't mix positional and keyword argumentscan't open %s for reading: %scan't open %s: %scan't open `%s' for writingcan't open a bfd on stdout %scan't open macro library file '%s' for reading: %scan't parse register listcan't predecrementcan't read from %s: %scan't redefine the index of a scalar aliascan't redefine the type of a register aliascan't redefine type for operandcan't resolve `%s' {%s section} - `%s' {%s section}can't resolve value for symbol `%s'can't set section flags for section %scan't start writing .mdebug section: %scan't use COBR format with external labelcan't use Neon quad register herecan't use R0 herecan't use alignment with this instructioncan't use high part of register in operand %dcan't use register '%s%s' as operand %d in '%s'.can't write %s: %scannot assemble into a literal fragmentcannot both predecrement and postincrementcannot branch to odd addresscannot combine index with optioncannot combine pre- and post-indexingcannot compress debug sections (zlib not installed)cannot convert expression symbol %s to complex relocationcannot create floating-point numbercannot decode instruction formatcannot define symbol `%s' in absolute sectioncannot determine Thumb instruction size. Use .inst.n/.inst.w insteadcannot do %s %u byte relocationcannot do %u byte pc-relative relocationcannot emit PC relative %s relocationcannot emit PC relative %s relocation against %scannot emit PC relative %s relocation%s%scannot emit relocation %s against subsy symbol %scannot encode opcode "%s"cannot encode opcode "%s" in the given format "%s"cannot generate relocation type for symbol %s, code %scannot honor width suffix -- `%s'cannot make a relative jump to an absolute locationcannot mask instruction using no functional unitcannot pack %s and %s togethercannot pack %s and %s together with a 16-bit insncannot pack %s into slot P1cannot pack %s with a 16-bit insncannot represent %s relocation in this object file formatcannot represent %s relocation in this object file format1cannot represent `%s' relocation in object filecannot represent relocation type %scannot represent relocation type %s in x32 modecannot resolve @slotcount parametercannot set literal_prefix inside literal fragmentcannot use post-indexing with PC-relative addressingcannot use post-indexing with this instructioncannot use register index with PC-relative addressingcannot use register index with this instructioncannot use writeback with PC-relative addressingcannot use writeback with this instructioncannot write to output file '%s': %scanonical = %s character constant too largecharacter following name is not '#'cmpu doesn't support condition code %sco-processor offset out of rangeco-processor register expectedcode is ATPCS conformantcode uses 26-bit program countercode uses 32-bit program countercomma is expectedcomma missing in .xstabscondition code invalid for jrcondition code value (%d) too largecondition not followed by conditionalizable insncondition requiredcondition sa cannot be used hereconditional branch follows set of flagsconditional branch or jal insn's operand references R%ld of previous arithmetic or logic insn.conditional branch out of rangeconditional infixes are deprecated in unified syntaxconfusing relocation expressionsconfusion in formal parametersconstant expression expectedconstant expression or register list expectedconstant expression requiredconstant out of 8-bit range: %dconstant too big to fit into instructionconstant value requiredcontrol register '%s' not supported on this architecturecontrol register expected, but saw '%.6s'convert_frag core and copro insn lengths must total 32 bits.core and copro insn lengths must total 64 bits.core register value (%d) too largecould not assemble: %scould not build transition for %s => %scould not parse INSN_PATTERN '%s'could not parse INSN_REPL '%s'could not set architecture and machinecould not skip to %ld in file `%s'could not update architecture and machinecould not write .mdebug section: %scouldn't find a valid instruction formatcpu `%s' unrecognizedcpu-type = %s cr%ld is a reserved control registerctoff() relocation used on an instruction which does not support itdangerous MULS/MULU location; give it higher alignmentdata dependency: %s %s -- %s %s (%d/%d bubble)data item with alignment larger than locationdest and source1 must be the same registerdest must overlap one source registerdestinationdestination for add/subtract can only be R2 or R3destination for multiply can only be R0 or R1destination operand must be 16 bit registerdestination operand must be 16bit absolute addressdestination operand must be 8 bit registerdestination register is same for parallel insnsdestination register modified by displacement-post-modified addressdestination register must be r1destination register same as write-back basedetected global register use not covered by .register pseudo-opdifference of two symbols only supported with .long, .short, or .bytedirective %s cannot be negateddirective .big encountered when option -big requireddirective .little encountered when option -little requireddirective LOC from within a BSPEC/ESPEC pair is not supporteddirective LOCAL must be placed in code or datadirectives are not valid inside bundlesdiscriminator less than zerodisplacement must be an unsigned 8-bit numberdisplacement overflows 12-bit fielddisplacement overflows 8-bit fielddisplacement to defined symbol %s overflows 12-bit fielddisplacement to defined symbol %s overflows 8-bit fielddisplacement to undefined symbol %s overflows 12-bit fielddisplacement to undefined symbol %s overflows 8-bit field displacement too large (%d)displacement too large for this architecture; needs 68020 or higherdiv / mul are reserved instructionsdivision by zerodivision by zero when setting `%s'dla used to load 32-bit registerdo not warn on use of deprecated featuredoes not match begin %s%s at %s:%ddon't use Rn-Rm syntax with non-unit stridedroping register %d in section %s does not match using register %ddroping register %d in section %s previously used in section %sdsp immediate shift value not constantduplicate !tlsgd!%ldduplicate !tlsldm!%ldduplicate ".else"duplicate .fnstart directiveduplicate .handlerdata directiveduplicate .personality directiveduplicate .personalityindex directiveduplicate datalabel operator ignoredduplicate instruction %sduplicate macro %sduplicated psr bit specifierelements must be smaller than reversal regionelse without matching ifemit_one_bundle: unexpected dynamic opempty label field for ISempty symbol name in .def; ignoredemulations not handled in this configurationend of file after a one-character quote; \0 insertedend of file in commentend of file in comment; newline insertedend of file in escape characterend of file in multiline commentend of file in string; '%c' insertedend of file inside conditionalend of file not at end of a line; newline insertedend of macro inside conditionalend on line errorendf without forendi without matching ifending register must be r15endw without whileentity size for SHF_MERGE not specifiedentry instruction with stack decrement < 16error constructing %s pseudo-op table: %serror parsing element/structure listerror setting flags for "%s": %serror setting flags for ".sbss": %sestimate size estimate_size_before_relax calledeven register number requiredeven register requiredexcess operands to %sexcess operands: '%s'expected #constantexpected %cexpected , expected .L, .W or .B for register in indexed addressing modeexpected 0 operands for generated labelexpected 0 or 1expected or or operandexpected expected , expected , expected , expected @(exp, reg16)expected EP registerexpected `%s' to have already been set for .vtable_inheritexpected address expressionexpected alignment after sizeexpected closing parenexpected commaexpected comma after "%s"expected comma after name "%s"expected comma after name `%s' in .size directiveexpected comma after name in .symverexpected comma after name in .vtable_entryexpected comma after name in .vtable_inheritexpected comma after opcodeexpected comma after operand nameexpected comma after register-modeexpected comma after register-numberexpected comma after subopcodeexpected comma after suffix classexpected comma after symbol nameexpected comma or colon after symbol name; rest of line ignoredexpected expressionexpected fill pattern missingexpected numeric constantexpected one operand for generated literalexpected quoted stringexpected registerexpected register listexpected simple numberexpected symbolexpected symbol nameexpected valid addressing mode for mova: "@(disp, ea.sz),ERn"expected }expecting )expecting ]expecting `)' after scale factor in `%s'expecting `,' or `)' after base register in `%s'expecting `,' or `)' after index register in `%s'expecting a register for operand %dexpecting comma delimited operandsexpecting comma delimited register operandsexpecting either ON or OFF after .listexpecting index register or scale factor after `,'; got '%c'expecting indirect register `($rA)'expecting indirect register `($rX)'expecting lockable instruction after `lock'expecting mnemonic; got nothingexpecting operand after ','; got nothingexpecting operand before ','; got nothingexpecting prefix; got nothingexpecting registerexpecting scale factor of 1, 2, 4, or 8: got `%s'expecting string instruction after `%s'expecting {expr.c(operand): bad atof_generic return val %dexpression doesn't fit in BYTEexpression doesn't fit in WORDexpression errorexpression must be constantexpression not a constantexpression out of range: defaulting to 0expression out of range: defaulting to 1expression syntax errorexpression too complexexpression too complex code symbolextended instruction in delay slotextended operand requested but not requiredextension `%s' unrecognizedextension does not apply to the base architectureextra .LABEL arguments ignored.extra closing braceextra colonextra commaextra opening braceextra stuff on line ignoredextraneous shift as part of operand to shift insnfailed for %d failed general register sanity check.failed regnum sanity check.failed sanity checkfailed sanity check.failed sanity check: long_jumpfailed sanity check: short_jumpfailed special case insn sanity checkfailed to read instruction table %s failed to set up debugging information: %sfake .file after real onefall through frequency must be greater than 0field fx_size too small to hold %dfield size must be 16 when value is relocatablefield value "%s" too complex for a bitfieldfield value truncatedfield width "%s" too complex for a bitfieldfield width %lu too big to fit in %d bytes: truncated to %d bitsfifthfile finished with an open IT block.file not found: %sfile number %ld already allocatedfile number less than onefilename goes over one page boundaryfirstfirst and second operands shall be the same registerfirst operand is floating pointfirst operand is too large for 16-bit signed intfirst operand is too large for a 24-bit displacementfirst register must be r4first transfer register must be evenfixes not all moved from %sflag for {c}psr instruction expectedfloating point args are in fp regsfloating point constant too largefloating point number invalidfloating point number invalid; zero assumedfloating point numbers are not implementedformat '%s' allows %d slots, but there are %d opcodesformat = %s format names only valid inside bundlesfound %d operands for '%s': Expected %dfound too many (%d) operands for '%s': Expected %dfourthfr_mem record before region record!fr_var %lu < length %dfr_var (%ld) < length (%d)frame reg expected, using $%d.frgr_mem record before region record!functional unit already maskedfunctional unit already masked for operand %u of '%.*s'functional unit already used in this execute packetgarbage after index spec ignoredgarbage at end of linegarbage following instructiongenerate PIC codeget_expanded_loop_offset: invalid opcodegr_gr record before region record!gr_mem record before region record!group name for SHF_GROUP not specifiedgroup section `%s' has no group signaturehandlerdata in cantunwind framehard-float conflicts with specified fpuhardware dividehaving the base register in the register list when using write back is UNPREDICTABLEhere is the "else" of the unterminated conditionalhere is the previous ".else"here is the previous ".if"here is the start of the unterminated conditionalhi() relocation used on an instruction which does not support ithi0() relocation used on an instruction which does not support ithigh bits set in register list expressionhint in B unit can't be usedhint in B unit may be treated as nophint.b may be treated as nophint.b shouldn't be usediWMMXt control register expectediWMMXt data or control register expectediWMMXt data register expectediWMMXt scalar register expectedia64.md_begin: can't hash `%s': %sidentifier+constant@%s means identifier@%s+constantidentifier+constant@got means identifier@got+constantif writeback register is in list, it must be the lowest reg in the listignoring attempt to re-define symbolignoring attempt to redefine built-in register '%s'ignoring attempt to redefine symbol %signoring attempt to use .unreq on fixed register name: '%s'ignoring bad alignmentignoring changed section attributes for %signoring changed section entity size for %signoring changed section type for %signoring extra '-rename-section' delimiter ':'ignoring fill value in absolute sectionignoring incorrect section type for %signoring invalid '-rename-section' specification: '%s'ignoring macro exit outside a macro definition.ignoring operands: %s ignoring redefinition of register alias '%s'ignoring unrecognized .endian type `%s'iif convert internal pcrel/binaryiif convert internal pcrel/pointerillegal %srelocation size: %dillegal .stab%c directive, bad characterillegal .stabx expression; zero assumedillegal double indirectionillegal expressionillegal immediate register operand %sillegal indirect referenceillegal literalillegal opcode %s for mcu %sillegal operandillegal operand - register name found where none expectedillegal operandsillegal range of target hardware versionsillegal register after @illegal register after @-illegal register included in listillegal register numberillegal resource usage in bundleimm5 should >= 2immediate 0 cannot be used hereimmediate 1 or 2 expectedimmediate expression requires a # prefiximmediate has bits set outside the operand sizeimmediate is not a power of twoimmediate must be 1 or 2immediate offset not 2-byte-alignedimmediate offset not 4-byte-alignedimmediate offset out of rangeimmediate operand illegal with absolute jumpimmediate operand is not matchimmediate operand is too largeimmediate operand requires iWMMXt2immediate operands sum to greater than 32immediate out of rangeimmediate out of range for insertimmediate out of range for narrowing operationimmediate out of range for shiftimmediate value is out of rangeimmediate value out of rangeimmediate value out of range, expected range [0, 16]immediate value out of range, expected range [1, 32]improper number of operands. expecting %d, got %dinappropriate arguments for opcode `%s'incompatible flag %i in line directiveinconsistent types in Neon instructionincorrect condition in IT blockincorrect format for multiply parallel instructionincorrect number of operands given in the first instructionincorrect number of operands given in the second instructionincorrect register `%s%s' used with `%c' suffixincorrect register in reglistincorrect register number, ignoringindex offset out of rangeindex register overlaps transfer registerindex register specified but zeroindirect %s without `*'inserting "%s" into %s alias hash table failed: %sinserting "%s" into %s name hash table failed: %sinserting "%s" into string hash table: %sinserting "%s" into symbol table failed: %sinserting "%s" into tag hash table: %sinsn can't be combined with parallel processing insninsn cannot be combined with non-nopxinsn cannot be combined with non-nopyinsn cannot be combined with pmulsinstruction %s may not follow another I/O instruction.instruction %s may not follow another memory access instruction.instruction %s requires %d operand(s)instruction '%.*s' cannot be predicatedinstruction '%s' cannot be executed in parallel.instruction '%s' is for the M32R2 onlyinstruction '%s' is for the M32RX onlyinstruction address is not a multiple of 16instruction address is not a multiple of 2instruction address is not a multiple of 4instruction address is not a multiple of 8instruction cannot be conditionalinstruction does not accept preindexed addressinginstruction does not accept scaled register indexinstruction does not accept this addressing modeinstruction does not accept unindexed addressinginstruction does not allow shifted indexinstruction does not support unindexed addressinginstruction does not support writebackinstruction implicitly accesses R31 of previous load.instruction is always unconditionalinstruction not allowed in IT blockinstruction not allowed: %sinstruction not supported in Thumb16 modeinstruction requires labelinstruction requires label or value in range -511:512instruction requires label sans '$'instruction requires register indexinstruction sequence (write a0, branch, retw) may trigger hardware erratainstructions write to the same destination register.integer operand out of rangeinternal Error, line %d, %sinternal Error: Can't hash %s: %sinternal confusion: relocation in a section without contentsinternal error: bad mips16 opcode: %s %s internal error: can't export reloc type %d (`%s')internal error: can't hash `%s': %s internal error: can't hash macro `%s': %sinternal error: can't hash opcode `%s': %sinternal error: can't install fix for reloc type %d (`%s')internal error: fixup not contained within fraginternal error: lookup/get operands failedinternal error: losing opcode: `%s' "%s" internal error: reloc %d (`%s') not supported by object file formatinternal error: unknown dwarf2 formatinternal error: unknown option name '%s'internal error; cannot generate `%s' relocationinternal error? cannot generate `%s' relocationinternal error? cannot generate `%s' relocation (%d, %d)internal failure in parse_register_listinternal inconsistency in %s: bdap.w with no symbolinternal inconsistency in %s: bdapq no symbolinternal inconsistency problem in %s: %lxinternal inconsistency problem in %s: ext. insn %04lxinternal inconsistency problem in %s: fr_subtype %dinternal inconsistency problem in %s: fr_symbol %lxinternal inconsistency problem in %s: insn %04lxinternal inconsistency problem in %s: resolved symbolinternal inconsistency problem: %s called for %d bytesinternal relocation (type: IMMEDIATE) not fixed upinternal: BFD_RELOC_MMIX_BASE_PLUS_OFFSET not resolved to sectioninternal: GREG expression not resolved to sectioninternal: bad mips opcode (bits 0x%lx undefined): %s %sinternal: bad mips opcode (mask error): %s %sinternal: bad mips opcode (unknown extension operand type `+%c'): %s %sinternal: bad mips opcode (unknown operand type `%c'): %s %sinternal: can't hash `%s': %sinternal: mmix_prefix_name but empty prefixinternal: unexpected relax type %d:%dinternal: unhandled label %sinternal_relocation (type: OFFSET_IMM) not fixed upinterrupt vector for trap instruction out of rangeinvalid -march= option: `%s'invalid -mavxscalar= option: `%s'invalid -mmnemonic= option: `%s'invalid -msse-check= option: `%s'invalid -msyntax= option: `%s'invalid -mtune= option: `%s'invalid in --march=: %sinvalid @slotcount valueinvalid BSPEC expressioninvalid FPA immediate expressioninvalid Hi register with immediateinvalid LOC expressioninvalid PC-relative operandinvalid PIC referenceinvalid VSIB addressinvalid abi -mabi=%sinvalid architectural extensioninvalid architecture %sinvalid architecture -A%sinvalid architecture -xarch=%sinvalid architecture -z%sinvalid architecture option -m%s, ignoredinvalid arg register listinvalid argument '%s' to -fdebug-prefix-mapinvalid attempt to declare external version name as default in symbol `%s'invalid barrier typeinvalid base register for register offsetinvalid branch operandinvalid byte branch offsetinvalid char %s beginning operand %d `%s'invalid character %s before operand %dinvalid character %s in mnemonicinvalid character %s in operand %dinvalid characters in inputinvalid condition code '%s'invalid condition code nameinvalid configuration option '%s' in transition rule '%s'invalid constantinvalid constant (%lx) after fixupinvalid constant: %d bit expression not in range %d..%dinvalid constant: %d bit expression not in range %u..%uinvalid constant: %d is not word align integerinvalid constant: 10 bit expression not in range [-2^9, 2^9-1]invalid constant: 20 bit expression not in range -2^19..2^19invalid constant: 25 bit expression not in range [-16777216, 16777215]invalid constant: 32 bit expression not in range [-0x80000000, 0x7fffffff]invalid constant: 32 bit expression not in range [0, 0xffffffff]invalid constant: 32 bit expression not word aligninvalid constant: bit expression not definedinvalid control register nameinvalid default displacement size "%s". Defaulting to %d.invalid empty loopinvalid expression evaluation type %dinvalid expression for operand %i of '%s'invalid expression in load/store multipleinvalid expression in operandinvalid flag '%s'invalid floating point register pair. Valid fp register pair operands are 0, 1, 4, 5, 8, 9, 12 or 13.invalid frame sizeinvalid hvc expressioninvalid identifier for ".ifdef"invalid identifier for ".option"invalid immediateinvalid immediate field positioninvalid immediate for address calculation (value = 0x%08lX)invalid immediate for stack address calculationinvalid immediate sizeinvalid immediate: %ld is out of rangeinvalid index registerinvalid index size for coldfireinvalid indirect register sizeinvalid instruction for this architecture; needs invalid instruction shapeinvalid instruction size selected (%d)invalid instruction suffixinvalid last instruction for a zero-overhead loopinvalid length for .scomm directiveinvalid listing option `%c'invalid literal constant: pool needs to be closerinvalid lrlive '%lu'invalid machine `%s'invalid merge entity sizeinvalid modeinvalid movx address registerinvalid movx dsp registerinvalid movy address registerinvalid movy dsp registerinvalid neon suffix for non neon instructioninvalid numberinvalid offset expressioninvalid offset, target not word aligned (0x%08lX)invalid offset, value too big (0x%08lX)invalid opcodeinvalid opcode '%s' in transition rule '%s'invalid opcode, "%s".invalid operandinvalid operand (%s section) for `%s'invalid operand (%s section) for `%s' when setting `%s'invalid operand in ldminvalid operand in stminvalid operand mode for this architecture; needs 68020 or higherinvalid operand of ()+invalid operand of -()invalid operand of S^#invalid operand size requestedinvalid operand suffixinvalid operand to .code directive (%d) (expecting 16 or 32)invalid operand to opcode %s: `%s'invalid operand, not a 10-bit signed value: %dinvalid operand, not a 11-bit signed value: %dinvalid operand, not a 12-bit signed value: %dinvalid operand, not a 13-bit signed value: %dinvalid operand, not a 16-bit signed value: %dinvalid operand, not a 16-bit unsigned value: %dinvalid operand, not a 5-bit unsigned value: %dinvalid operand, not a 6-bit signed value: %dinvalid operand, not a 6-bit unsigned value: %dinvalid operand, not a multiple of 32: %dinvalid operand, not a multiple of 4: %dinvalid operand, not a multiple of 8: %dinvalid operand, not an even value: %dinvalid operand: expression in PT targetinvalid operandsinvalid operands (%s and %s sections) for `%s'invalid operands (%s and %s sections) for `%s' when setting `%s'invalid operands for opcodeinvalid operands to %sinvalid operands to opcode %s: `%s'invalid opertypeinvalid or unsupported encoding in .cfi_lsdainvalid or unsupported encoding in .cfi_personalityinvalid priority '%lu'invalid pseudo operationinvalid register '%s' for '%s' instructioninvalid register in & expressioninvalid register listinvalid register list to push/pop instructioninvalid register maskinvalid register nameinvalid register number (%ld) for '%s'invalid register number (%ld) for '%s' instructioninvalid register number: %d is not in [r0--r7]invalid register: r15 illegalinvalid relaxation fragment resultinvalid reloc expressioninvalid relocationinvalid relocation for '%s' instructioninvalid relocation for fieldinvalid relocation for instructioninvalid relocation for operand %d of '%s'invalid relocation for operand %i of '%s'invalid relocation in instruction slot %iinvalid rotationinvalid scale factorinvalid segment "%s"invalid shiftinvalid shift value: %ldinvalid short form floating point immediate operandinvalid smc expressioninvalid static register listinvalid subopcode %dinvalid suffix after register.invalid suffix classinvalid swi expressioninvalid switch -m%sinvalid symbolic operandinvalid syntax classinvalid syntax for .dn directiveinvalid syntax for .qn directiveinvalid syntax for .req directiveinvalid syntax for .unreq directiveinvalid system register nameinvalid target hardware versioninvalid unextended operand valueinvalid unwind opcodeinvalid use of %s relocationinvalid use of operator "%s"invalid value for special purpose registeris_stmt value not 0 or 1isa number less than zerojump not 3..10 bytes away (is %d)jump target out of rangejump to misaligned address (0x%lx)junk `%s' after expressionjunk `%s' after registerjunk after operand %u of '%.*s'junk at end of line, first unrecognized character is `%c'junk at end of line, first unrecognized character valued 0x%xjunk at end of line: `%s'la used to load 64-bit addresslabel "$%d" redefinedlabel "%d$" redefinedlabel %s was not defined in this dwarf sectionlabel after '||'label after predicatelabel not at start of execute packetlabels are not valid inside bundleslacking labellacking label last register must be r7ldr to register 15 must be 4-byte allignedldrd/strd requires even:odd register pairleft operand is a bignum; integer 0 assumedleft operand is a float; integer 0 assumedlength not neededlength of symbol "%s" already %ld, ignoring %dli rd label isn't correct instruction formline %d: rep or repi must include at least 4 instructionsline %d: unable to place address of symbol '%s' into a byteline %d: unable to place address of symbol '%s' into a quadline %d: unable to place address of symbol '%s' into a shortline %d: unable to place value %lx into a byteline %d: unable to place value %lx into a shortline %d: unknown relocation type: 0x%xline number (%d) for .stab%c directive cannot fit in index field (20 bits)line numbers must be positive; line number %d rejectedliteral pool insertion failedliteral pool location required for text-section-literals; specify with .literal_positionliteral pool overflowliteral referenced across section boundarylk addressing modes are invalid for memory-mapped register addressinglmi pseudo instruction should not use a label in imm fieldlo register requiredlo() relocation used on an instruction which does not support itloading the same register in parallel operationlocal label `%s' is not definedlong jump requiredloop containing less than three instructions may trigger hardware errataloop end too close to another loop end may trigger hardware errataloop target does not follow loop instruction in sectionloop too long for LOOP instructionlow register(r0-r15)expected, not '%.100s'lower 16 bits of mask ignoredlui expression (%lu) not in range 0..65535m68k and cf features both selectedmacro requires $at register while noat in effectmacro requires $at while $at in usemacros nested too deeplymajor opcode is not sorted for %smalformed reglist in push/popmask trims opcode bits for %smd_apply_fix: unknown r_type 0x%x md_estimate_size_before_relax misaligned branch destinationmisaligned datamisaligned offsetmismatch between opcode size and operand sizemismatch between register and suffixmismatched .ebmismatched element/structure types in listmismatched parenthesesmisplaced .procendmisplaced PIC operandmissing '%c'missing ')'missing ')' in %%-opmissing ']'missing +missing .endmissing .end at end of assemblymissing .end or .bend at end of filemissing .endp before .cfi_startprocmissing .fnstart before unwinding directivemissing .funcmissing .procmissing =missing CPS flagsmissing [missing ]missing `)'missing `)' after formals in macro definition `%s'missing `.end'missing `}'missing alignmentmissing architectural extensionmissing architecture name `%s'missing argumentmissing argument for sse_check directivemissing argument separator ',' for .cpsetupmissing classmissing close quote; (assumed)missing closing `%c'missing closing bracemissing closing parenthesismissing commamissing comma after insn constant missing comma after segment namemissing comma or colonmissing condition code in structured control directivemissing cpu architecturemissing cpu name `%s'missing domissing emulation mode namemissing end-quotemissing expressionmissing expression in .size directivemissing frame sizemissing labelmissing local expressionmissing model parametermissing namemissing opcodemissing operandmissing operand after commamissing operand; zero assumedmissing or bad offset expressionmissing or invalid displacement expression `%s'missing or invalid displacement expression `%s' taken as 0missing or invalid expression `%s'missing or invalid immediate expression `%s'missing real symbol namemissing reloc typemissing rename stringmissing rotation field after commamissing section attribute identifiermissing section namemissing section type namemissing segment namemissing separatormissing sizemissing size expressionmissing sizeof_stub expressionmissing stringmissing symbol namemissing thenmissing to or downtomissing typemissing valuemissing version name in `%s' for symbol `%s'more than 65K literal poolsmore than one frame size in listmultiple '||' on same linemultiple branches or jumps in the same bundlemultiple condition specificationsmultiple emulation names specifiedmultiple formats specified for one bundle; using '%s'multiple literals in expansionmultiple movx specificationsmultiple movy specificationsmultiple parallel processing specificationsmultiple predicates on same linemultiple sections remapped to output section %smultiple versions [`%s'|`%s'] for symbol `%s'multiple writes to the same registermust be @(r0,...)must branch to an address a multiple of 4must specify extensions to add before specifying those to removenegative alignmentnegative offsetnegative operand number %dnegative sizenegative subopcode %dnegative symbol lengthnegative value ignored in %snested .bs blocksnested .ent directivesnested software pipelined loopnew line in titlenew section '%s' defined without attributes - this might cause problemsnext outside of structured loopno %d-byte relocations availableno '(' to match ')'no '[' to match ']'no compiled in support for 32bit x86_64no compiled in support for x86_64no current file pointerno entry symbol for global function '%s'no file name following -t optionno filename following .INCLUDE pseudo-opno hppa_fixup entry for fixup type 0x%xno instruction mnemonic suffix given and no register operands; can't size instructionno instruction mnemonic suffix given; can't determine immediate sizeno registered fragment for literalno sequence number after !%sno such architecture modifier: `%s'no such architecture: `%s'no such instruction: `%s'no such sfr in this architectureno suitable GREG definition for operandsno tag specified for %sno way to handle .file within .ent/.end sectionnon-absolute expression in constant fieldnon-absolute value used with .space/.besnon-constant byte countnon-constant expression in ".elseif" statementnon-constant expression in ".if" statementnon-contiguous register rangenon-immediate OPF operand, ignorednon-pc-relative relocation for pc-relative fieldnot a 16 bit instruction '%s'not enough operands (%d) for '%s'; expected %dnot using any base registernumber must be positive and less than %dnumber of literal tokens != 1number of operands mismatchnumber of registers must be in the range [1:4]odd address operand: %ldodd displacement at %xodd distance branch (0x%lx bytes)odd number cannot be used hereodd number of bytes in operand descriptionodd numbered general purpose register specified as register pairodd register cannot be used hereoffset in operand %u of '%.*s' not divisible by %uoffset in operand %u of '%.*s' out of rangeoffset must be zero in ARM encodingoffset not a multiple of 4offset out of rangeoffset to unaligned destinationoffset too largeonly D registers may be indexedonly LSL shift allowed in thumb modeonly SUBS PC, LR, #const allowedonly constant expression allowedonly constant offsets supported in absolute sectiononly lo regs allowed with immediateonly lower 16-bits of first operand are usedonly one type should be specified for operandonly r15 allowed hereonly supported with old gcconly two consecutive VFP SP registers allowed hereopcode %s: could not parse operand '%s' in '%s'opcode %s: unidentified operand '%s' in '%s'opcode '%s': cannot find literal definitionopcode '%s': no bound opname '%s' for precondition in %sopcode '%s': no bound opname '%s' for precondition in '%s'opcode '%s': precondition only contains constants in '%s'opcode '%s': replacement does not have %d opsopcode 'NOP.N' unavailable in this configurationopcode 0x3 and SYNTAX_3OP invalidopcode `%s' not supported for target %sopcode has no effectopcode not supported on this processor: %sopcode not supported on this processor: %s (%s)opcode not valid for this cpu variantopcode-specific %s relocation used outside an instructionopcodes '%s' (slot %d) and '%s' (slot %d) both have volatile port accessesopcodes '%s' (slot %d) and '%s' (slot %d) write the same portopcodes '%s' (slot %d) and '%s' (slot %d) write the same registeropcodes '%s' (slot %d) and '%s' (slot %d) write the same stateopen CFI at the end of file; missing .cfi_endproc directiveoperandoperand %d of '%s' has invalid value '%u'operand %d of '%s' has out of range value '%u'operand %d overlap in %soperand %d: illegal use expression: `%s`operand %s0x%lx out of range.operand %u of '%.*s' is read-onlyoperand %u of '%.*s' is write-onlyoperand %u of '%.*s' not a valid base address registeroperand %u of '%.*s' not a valid memory referenceoperand %u of '%.*s' not a valid return address registeroperand %u of '%.*s' not constantoperand %u of '%.*s' on wrong sideoperand %u of '%.*s' out of rangeoperand 0 must be FPSCRoperand 1 must be FPSCRoperand index error for %soperand is not an absolute constantoperand is not an immediateoperand mask overflowoperand must be a constantoperand must be a constant or a labeloperand must be a multiple of 2operand must be a multiple of 4operand must be absolute in range %d..%d, not %doperand must be absolute in range %u..%u, not %ldoperand not a multiple of 4 for PT, PTA or PTB: %doperand number mismatchoperand out of rangeoperand out of range (%d is not between %d and %d)operand out of range (%s not between %ld and %ld)operand out of range for PT, PTA and PTBoperand out of range, instruction expandedoperand out of range: %ldoperand out of range: %luoperand overflowoperand references R%ld of instruction before previous.operand references R%ld of previous instruction.operand references R%ld of previous load.operand size mismatchoperand size must be specified for immediate VMOVoperand size must match register widthoperand type mismatchoperand types can't be inferredoperand value out of range for instructionoperand/size mis-matchoperands 0 and 1 must be the same registeroperands for opcode `%s' do not match any valid formatoperands mismatchoperands were not reducible at assembly-timeoperation combines symbols in different segmentsoption --link-relax is only supported in b.out formatoption `%s' may not be negatedoption `%s' not recognizedoption `-%c%s' is deprecated: %soption `-A%s' is deprecated: use `-%s'or higherout of memoryout of rangeoverflowoverflow in branch to %s; converted into longer instruction sequenceoverflow in literal (.lit8) tableoverflow in literal (.lita) tablep2align not supported on this targetpacking conflict: %s must dispatch sequentiallypadding addedparallelparallel instruction not following another instructionparentheses ignoredparse errorpartial line at end of file ignoredpc may not be used with write-backpc-relativepc-relative pce instruction error (16 bit || 16 bit)'pcrel for branch to %s too far (0x%lx)pcrel for branch to %s too far (0x%x)pcrel for loopt too far (0x%lx)pcrel for lrw/jmpi/jsri to %s too far (0x%lx)pcrel relocation not allowed in an instructionpcrel too farpcrel too far BFD_RELOC_BFIN_10pcrel too far BFD_RELOC_BFIN_11_PCRELpcrel too far BFD_RELOC_BFIN_12pcrel too far BFD_RELOC_BFIN_24pcrel too far BFD_RELOC_BFIN_5pcrel too far BFD_RELOC_MOXIE_10personality routine required before .handlerdata directivepersonality routine specified for cantunwind framepointer register (X, Y or Z) requiredpointer register (Y or Z) requiredpointer register Z requiredpolymorphs are not enabled. Use -mP option to enable.post-index must be a registerpost-indexed expression used in preload instructionpostincrement not supportedpowerpc_operands[%d] duplicates powerpc_operands[%d]powerpc_operands[%d].bitm invalidpre-indexed expression expectedpredicate not followed by instructionpredication on A0 not supported on this architectureprefer-const16 conflicts with prefer-l32rprefer-l32r conflicts with prefer-const16previous .ent not closed by a .endprevious CFI entry not closed (missing .cfi_endproc)previous movx requires nopyprevious movy requires nopxprofiling in absolute section?pseudo-op illegal within .struct/.unionpush/pop do not support {reglist}^qualifying predicate not followed by instructionr13 not allowed herer14 not allowed as first register when second register is omittedr14 not allowed herer15 based store not allowedr15 not allowed herer2 should not be used in indexed addressing moderd must be even number.rdhi and rdlo must be differentrdhi, rdlo and rm must all be differentre-entrant coderecord type is not validrecord_type_not_validredefined symbol cannot be used on relocredefinition of global registerredefinition of mcu type %s' to %s'redefinition of mcu type `%s' to `%s'redundant %s prefixreg should <= 31reg-reg expectedregister expectedregister expected, but saw '%.6s'register expected, not '%.100s'register is out of orderregister is wrong size for a word %sregister is wrong size for address %sregister list must contain at least 1 and at most 16 registersregister list not in ascending orderregister must be either sp or set by a previousunwind_movsp directiveregister name or number from 0 to 31 requiredregister number %u not supported on this architectureregister number above 15 requiredregister number out of rangeregister number too large for push/popregister operand expected, but got scalarregister out of range in listregister pair for operand %u of '%.*s' not a valid even/odd pairregister r%d out of rangeregister r0 cannot be used hereregister r16-r23 requiredregister r24, r26, r28 or r30 requiredregister range not in ascending orderregister rh%d out of rangeregister rl%d out of rangeregister rq%d does not existregister rq%d out of rangeregister rr%d does not existregister rr%d out of rangeregister same as write-back baseregister save offset not a multiple of %uregister section has contents register stride must be 1 or 2register syntax is .register %%g[2367],{#scratch|symbolname|#ignore}register type mismatchregister value used as expressionregisters may not be the samerel too far BFD_RELOC_16rel too far BFD_RELOC_8rel31 relocation overflowrelative address out of rangerelative call out of rangerelative jump out of rangerelaxation not supported reloc %d not supported by object file formatreloc not within (fixed part of) sectionrelocated field and relocation type differ in signednessrelocation %s isn't supported by the current ABIrelocation is not supportedrelocation not applicablerelocation out of rangerelocation overflowrepeat < 0; .fill ignoredrequired displacement wasn't given in indirect referenceresource conflict (A%d)resource conflict (C flag)resource conflict (F flag)resource conflict (PSW)resource conflict (R%d)rest of line ignored; first ignored character is `%c'restore without savereturned from mips_ip(%s) insn_opcode = 0x%x right operand is a bignum; integer 0 assumedright operand is a float; integer 0 assumedror #imm not supportedrotation can only be 0, 8, 16, or 24rounding down first operand float to signed introunding down first operand float to unsigned intrva without symbols suffix on comparison instruction is deprecateds3_PIC code offset overflow (max 16 signed bits)same type of prefix used twicescalar index must be constantscalar index out of rangescalar must have an indexscalar out of range for multiply instructionscale factor invalid on this architecture; needs cpu32 or 68020 or higherscale factor of %d without an index registerscore3d instruction.sdaoff() relocation used on an instruction which does not support itsecondsecond .ent directive found before .end directivesecond operand missingsecond operand must be 1second operand of .insn not a constant second register should be greater than first registersecond register should follow dash in register listsection %s renamed multiple timessection '%s' finished with an open IT block.section `%s' aliased to `%s' is not usedsection alignment must be >= 4 bytes to check MULS/MULU safenesssection change from within a BSPEC/ESPEC pair is not supportedsection symbols are already globalseek to end of .incbin file failed `%s'segment override on `%s' is ineffectualselected FPU does not support instructionselected processor does not have all features of selected architectureselected processor does not support 'A' form of this instructionselected processor does not support ARM mode `%s'selected processor does not support ARM opcodesselected processor does not support DSP extensionselected processor does not support THUMB opcodesselected processor does not support Thumb mode `%s'selected processor does not support Thumb-2 mode `%s'selected processor does not support requested special purpose registerselected target format '%s' unknownsequence number in use for !tlsgd!%ldsequence number in use for !tlsldm!%ldsequentialset: number not in -2147483648..4294967295 rangeset: number not in 0..4294967295 rangesetsw: number not in -2147483648..4294967295 rangesetting incorrect section attributes for %ssetting incorrect section type for %ssetx: illegal temporary register g0setx: temporary register same as destination registershift by register not allowed in thumb modeshift countshift expression expectedshift expression is too largeshift must be constantshift out of rangeshift value over 3 not allowed in thumb modeshifts in CMP/MOV instructions are only supported in unified syntaxshort branch with zero offset: use :wshortcut designator invalidshould have 1 or 2 operandsshould have two operandssigned .word overflow; switch may be too large; %ld at 0x%lxsize (%ld) out of range, ignoredsize is not 4 or 6size negative; .fill ignoredsize of "%s" is already %ld; not changing to %ldskip (%ld) or count (%ld) invalid for file size (%ld)skipping prefixes on this instructionskipping two-word instructionsmi pseudo instruction should not use a label in imm fieldsome symbol undefined; zero assumedsourcesource operand must be 16bit absolute addresssource operand must be 8 bit registersource register must be r1source register same as write-back basesource1 and dest must be same registerspace allocation too complex in absolute sectionspace allocation too complex in common sectionsparc convert_frag special left instruction `%s' kills instruction `%s' in right containerspecified location wasn't TETRA-alignedspill_mask record unimplemented.spu convert_frag spurious operands; (%d operands/instruction max)st/ld offset 23 instruction was disabled .stack frame layout does not match personality routinestack frame layout too complex for unwinderstack increment must be multiple of 4stack pointer offset too large for personality routinestand-alone `%s' prefixstart address not supportedstrange paper height, set to no formstray `\'stride of 2 unavailable when element size is 8string too big (%lu bytes)strings must be placed into a sectionsubcode value found when opcode not equal 0x03support ARM/Thumb interworkingswp{b} use is deprecated for this architecturesymbol "%s" undefined; zero assumedsymbol %s is in a different sectionsymbol %s is weak and may be overridden latersymbol '%s' is already definedsymbol `%s' aliased to `%s' is not usedsymbol `%s' already definedsymbol `%s' can not be both weak and commonsymbol `%s' is already definedsymbol `%s' is already defined as "%s"/%s%ldsymbol as destination registersymbol definition loop encountered at `%s'symbol in .toc does not match any .tcsymbol type "%s" is supported only by GNU targetssymbol%dsymbol+offset not supported for got tlssymbolic operand not allowedsymbols assigned with .asg must begin with a lettersymbols assigned with .eval must begin with a lettersyntax errorsyntax error in .startof. or .sizeof.syntax error in @(disp,[Rn, gbr, pc])syntax error in @(r0,...)syntax error in @(r0...)syntax error in structured control directivesyntax error: condition code not expectedsyntax error: expected `]', found `%c'syntax error: invalid toc specifier `%s'syntax error: register not expectedsyntax error: system register not expectedsyntax error: value is missing before the register namesyntax error; ')' not allowed heresyntax error; end of line, expected `%c'syntax error; expected ,syntax error; found `%c', expected `%c'syntax error; missing '(' after displacementsyntax error; missing ')' after base registersystem registers cannot be included in listtag not found for .tag %starget of %s instruction must be a labeltdaoff() relocation used on an instruction which does not support ittext label `%s' aligned to odd boundarythe first operand of `%s' must be `%s%s'the last operand of `%s' must be `%s%s'the offset 0x%08lX is not representablethe only valid suffixes here are '(plt)' and '(tlscall)'the type of %s is too complex; it will be simplifiedthe yielding instruction %s may not be in a delay slot.there are no unsigned pc-relative relocationsthirdthis DS form not yet supportedthis addressing mode is not applicable for destination operandthis addressing mode requires base-register writebackthis group relocation is not allowed on this instructionthis instruction does not support indexingthis instruction requires a post-indexed addressthis instruction will not write back the base registerthis instruction will write back the base registerthis string may not contain '\0'thumb conditional instruction should be in IT blocktoo few operandstoo many !literal!%ld for %stoo many .dim entriestoo many .size entriestoo many GREG registers allocated (max %d)too many IVC2 insns to pack togethertoo many IVC2 insns to pack with a 16-bit core insntoo many IVC2 insns to pack with a 32-bit core insntoo many argumentstoo many fixupstoo many instructions in execute packettoo many lda insns for !gpdisp!%ldtoo many ldah insns for !gpdisp!%ldtoo many lituse insns for !lituse_tlsgd!%ldtoo many lituse insns for !lituse_tlsldm!%ldtoo many memory references for `%s'too many operandstoo many operands (%d) for '%s'; expected %dtoo many operands in instructiontoo many operands to '%.*s'too many operands: %stoo many positional argumentstoo many st_End'stoo many suffixestoo many unwind opcodestoo many unwind opcodes for personality routine 0too many unwinding instructionstranslating bgeni to movitranslating bmaski to movitranslating mgeni to movitranslating to `%s %s%s'translating to `%s %s%s,%s%s'translating to `%sp'trap exception not supported at ISA 1truncated file `%s', %ld of %ld bytes readtwo .function pseudo-ops with no intervening .eftype %d reloc done? type specifier has the wrong number of partstypes specified in both the mnemonic and operandsunable to compute ADRL instructions for PC offset of 0x%lxunable to generate unwinding opcode for frame pointer offsetunable to generate unwinding opcode for frame pointer reg %dunable to generate unwinding opcode for reg %dunable to locate include file: %sunable to pack %s by itself?unable to restore return address from previously restored regunable to widen instructionunaligned branch target: %d bytes at 0x%lxunaligned data at an absolute location is not supportedunaligned entry instructionunaligned loop: %d bytes at 0x%lxunaligned registerunassigned file number %ldunbalanced brackets in operand %d.unbalanced parenthesis in operand %d.unclosed '('undecodable fixundecodable instruction in instruction fragundefined combination of operandsundefined local label `%s'undefined symbol %s in PCR relocationundefined symbol %s used as an immediate valueundefined symbol for opcode "%s"unexpected .cantunwind directiveunexpected .handlerdata directiveunexpected .unwind_movsp directiveunexpected 12-bit reloc typeunexpected 18-bit reloc typeunexpected TLS relocationunexpected `"' in expressionunexpected bit specified after APSRunexpected character `%c' in type specifierunexpected end of file in irp or irpcunexpected end of file in macro `%s' definitionunexpected fixunexpected register in listunexpected sizeof_stub expressionunexpected storage class %dunhandled %d unhandled CFA insn for unwinding (%d)unhandled local relocation fix %sunhandled operand code %dunhandled relocation type %sunhandled: .proc %s,%dunimplemented opcode "%s"unimplemented segment %s in operandunindexed addressing used in preload instructionunknownunknown -mpid= argument '%s'unknown .loc sub-directive `%s'unknown EABI `%s' unknown ISA level %sunknown ISA or architecture %sunknown MCU: %s unknown addressing mode %sunknown addressing mode for operand %sunknown architectural extension `%s'unknown architectureunknown architecture %sunknown architecture '%s'unknown architecture `%s' unknown argument for .usepvunknown condition code: %sunknown constraint `%c'unknown cpu `%s'unknown directiveunknown escape '\%c' in string; ignoredunknown execution type passed to write_2_short()unknown expression in operand %sunknown expression in operand %s. use #llo() #lhi() #hlo() #hhi() unknown floating point abi `%s' unknown floating point format `%s' unknown floating type type '%c'unknown group relocationunknown implicit IT mode `%s', should be arm, thumb, always, or never.unknown instruction '%s'unknown interrupt %sunknown opcodeunknown opcode "%s"unknown opcode %sunknown opcode '%s'unknown opcode `%s'unknown opcode or format name '%s'unknown opcode1: `%s'unknown opcode2 `%s'.unknown opcode: %sunknown opcode: `%s'unknown operand %sunknown operand shift: %x unknown operand to .archunknown operator %sunknown operator %s. Did you mean X(Rn) or #[hl][hl][oi](CONST) ?unknown operator (r%s substituted as a register nameunknown or invalid section attribute '%s'unknown or invalid section type '%s'unknown parameter following .SECTION directive: %sunknown procedure kindunknown profiling flag - ignored.unknown pseudo-op: `%s'unknown register '%s' -- .req ignoredunknown register alias '%s'unknown relocation (%u)unknown section attribute %sunknown section attribute '%c'unknown suffix classunknown syntax format character `%c'unknown user-defined function %sunknown/incorrect operandunmatched '['unmatched end directiveunrecognised alignment value in .SECTION directive: %sunrecognised cpu type '%s'unrecognized .linkonce type `%s'unrecognized .section attribute: want a,e,w,x,M,S,G,Tunrecognized CPS flagunrecognized characters at end of parallel processing insnunrecognized default cpu `%s'unrecognized emulation name `%s'unrecognized fopt optionunrecognized opcodeunrecognized option -%c%sunrecognized reloc typeunrecognized relocation suffixunrecognized section attributeunrecognized section command `%s'unrecognized section typeunrecognized section type `%s'unrecognized symbol type "%s"unrecognized syntax mode "%s"unresolvable or nonpositive repeat count; using 1unresolved expression that must be resolvedunresolved loop target symbol: %sunshifted register requiredunsupportedunsupported BFD relocation size %dunsupported BFD relocation size %uunsupported DC typeunsupported PC relative reference to different sectionunsupported alignmentunsupported alignment for instructionunsupported byte value; use a different suffixunsupported constant size %d unsupported fixup size %dunsupported flag %i in line directiveunsupported fptr fixupunsupported fptr fixup size %dunsupported large constantunsupported relocationunsupported relocation against %sunsupported relocation for DS offset fieldunsupported relocation typeunsupported section attribute '%c'unsupported syntaxunsupported variable size or fill valueunsupported vector index registerunsupported with Intel mnemonicunterminated stringunterminated string; newline inserteduntil without repeatunwind opcode too longunwound frame has negative sizeunwound stack pointer not doubleword aligneduse -march=armv2use -march=armv2ause -march=armv3use -march=armv3muse -march=armv4use -march=armv4tuse -march=armv5use -march=armv5tuse -march=armv5teuse -mcpu=alluse -mcpu=arm1use -mcpu=arm2use -mcpu=arm250use -mcpu=arm3use -mcpu=arm6use -mcpu=arm600use -mcpu=arm610use -mcpu=arm620use -mcpu=arm7use -mcpu=arm70use -mcpu=arm700use -mcpu=arm700iuse -mcpu=arm710use -mcpu=arm7100use -mcpu=arm710cuse -mcpu=arm710tuse -mcpu=arm720use -mcpu=arm720tuse -mcpu=arm740tuse -mcpu=arm7500use -mcpu=arm7500feuse -mcpu=arm7duse -mcpu=arm7diuse -mcpu=arm7dmuse -mcpu=arm7dmiuse -mcpu=arm7muse -mcpu=arm7tdmiuse -mcpu=arm8use -mcpu=arm810use -mcpu=arm9use -mcpu=arm920use -mcpu=arm940use -mcpu=arm9tdmiuse -mcpu=iwmmxtuse -mcpu=strongarmuse -mcpu=strongarm110use -mcpu=strongarm1100use -mcpu=strongarm1110use -mcpu=xscaleuse -mfpu=fpa10use -mfpu=fpa11use -mfpu=fpeuse .code16 to ensure correct addressing modeuse either -mfpu=softfpa or -mfpu=softvfpuse frame pointeruse of PC in this instruction is deprecateduse of old and new-style options to set CPU typeuse of old and new-style options to set FPU typeuse of r13 is deprecateduse of r15 in blx in ARM mode is not really usefuluse of r15 in bx in ARM mode is not really usefuluse of r15 in bxj is not really usefuluse stack size checkingused $%u with ".set at=$%u"used $at without ".set noat"using `%s%s' instead of `%s%s' due to `%c' suffixusing a bit field width of zerovalid endian specifiers are be or levalue %d out of range. Use #lo() or #hi()value %ld out of rangevalue 0x%I64x truncated to 0x%I64xvalue 0x%llx truncated to 0x%llxvalue 0x%lx truncated to 0x%lxvalue not in range [-0xffffffff, 0xffffffff]value not in range [0, 0x7fffffff]value not in range [0, 0xffffffff]value of %ld out of byte displacement range.value of %ld out of double word displacement range.value of %ld out of word displacement range.value of %s too large for field of %d bytes at %svalue out of rangevalue out of range: %dvalue stored for r%d is UNKNOWNvalue too large for 1-byte fieldvalue too large for 2-byte fieldvalue too large to fit in %d bitsvector type expectedvirtual memory exhaustedvliw group must consist of 1 core and 1 copro insn.warning: symbol %s has no csectwidth suffixes are invalid in ARM modewidth suffixes are invalid in ARM mode -- `%s'word of NOPs added between word multiply and 16-bit multiplyword of NOPs added between word multiply and loadwriteback (!) must be used for VLDMDB and VSTMDBwriteback of base register is UNPREDICTABLEwriteback of base register when in register list is UNPREDICTABLEwriteback used in preload instructionwriting or modifying # is unpredictablewriting to APSR without specifying a bitmask is deprecatedwrong number of operandswrong number of operands for '%s'wrong register in floating-point reglistwrong second argument to .cfi_lsdawrong second argument to .cfi_personalitywrong third argument to .cfi_val_encoded_addrxtensa-isa failure: %syou can't `pop %scs'you must specify a single type onlyzdaoff() relocation used on an instruction which does not support itzero assumed for missing expressionzero used as immediate value{standard input}Project-Id-Version: gas 2.22.90 Report-Msgid-Bugs-To: [email protected] POT-Creation-Date: 2011-10-25 12:00+0100 PO-Revision-Date: 2012-07-27 17:13-0500 Last-Translator: Cristian OthÃ³n MartÃnez Vera Language-Team: Spanish Language: es X-Bugs: Report translation errors to the Language-Team address. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8-bit [por defecto es %d] [por defecto es %s] %s especifica la variante de la arquitectura 960 -b agrega cÃ³digo para recolectar estadÃsticas sobre las ramificaciones tomadas -link-relax preserva las directivas de alineaciÃ³n individuales del enlazador so se puede relajar (sÃ³lo en el formato b.out) -no-relax no altera las instrucciones comparar-y-ramificar para desubicaciones largas especifica la variante de la arquitectura SPARC -bump avisa cuando el ensamblador cambia entre arquitecturas -sparc se descarta --enforce-aligned-data fuerza .long, etc., a ser alineados correctamente -relax relaja saltos y ramificaciones (por defecto) -no-relax evita cambiar cualquier salto y ramificaciÃ³n %s fich entrada : %s opciones pasadas : fich salida : %s objetivo : %s marca tiempo : %s Opciones D30V: -O Hace adjacentes las instrucciones paralelas short si es posible. -n Avisa sobre todos los NOPs insertados por el ensamblador. -N Avisa sobre los NOPs insertados despuÃ©s de los mÃºltiplos de word. -c Avisa sobre los sÃmbolos cuyos nombres coincidan con nombres de registros. -C Lo opuesto de -C. -c es por defecto. Opciones de TIC4X: -mcpu=CPU -mCPU selecciona variante de arquitectura. CPU puede ser: 30 - TMS320C30 31 - TMS320C31, TMS320LC31 32 - TMS320C32 33 - TMS320VC33 40 - TMS320C40 44 - TMS320C44 -mrev=REV define la revisiÃ³n de hardware de cpu (num enteros). Las combinaciones de -mcpu y -mrev will activarÃ¡n o desctivarÃ¡n las opciones apropiadas (-midle2, -mlowpower y -menhanced) de acuerdo al tipo escogido -mbig selecciona el modelo de memoria big -msmall selecciona el modelo de memoria small (por defecto) -mregparm selecciona parÃ¡metros de registro (por defecto) -mmemparm selecciona parÃ¡metros de memoria -midle2 activa el soporte para IDLE2 -mlowpower activa el soporte para LOPOWER y MAXSPEED -menhanced activa el soporte para cÃ³digos de operaciÃ³n mejorados que violan las restricciones que violan las restricciones paralelas pueden violar restricciones que pueden violar las restricciones EXTENSIÃ“N es una combinaciÃ³n de: Los registros no necesitarÃ¡n ningÃºn prefijo. Los registros requerirÃ¡n un prefijo `$'. emula la salida (por defecto %s) Graba el tipo de cpu -EB ensambla cÃ³digo para un cpu big-endian -EL ensambla cÃ³digo para un cpu little-endian -FIXDD ensambla cÃ³digo para la dependencia de datos fija -G gpnum ensambla cÃ³digo para definir gpsize y por defecto es 8 byte -KPIC ensambla cÃ³digo para PIC -NWARN ensambla cÃ³digo para que no avise sobre dependencia de datos fijo -O0 el ensamblador no realizarÃ¡ ninguna optimizaciÃ³n -SCORE3 ensambla cÃ³digo para el objetivo SCORE3 -SCORE5 ensambla cÃ³digo para el objetivo SCORE5 -SCORE5U ensambla cÃ³digo para el objetivo SCORE5U -SCORE7 ensambla cÃ³digo para el objetivo SCORE7, esta es la opciÃ³n por defecto -USE_R1 ensambla cÃ³digo para que no avise cuando se usa el registro temporal r1 -V versiÃ³n de Sunplus -V muestra el nÃºmero de versiÃ³n del ensamblador -Qy, -Qn se descarta -march=score3 ensambla cÃ³digo para el objetivo SCORE3 -march=score7 ensambla cÃ³digo para el objetivo SCORE7, esta es la opciÃ³n por defecto Opciones de S390: -mregnames Permite nombres simbÃ³licos para los registros -mwarn-areg-zero Avisa sobre registros con base/Ãndice cero -mno-regnames No permite nombres sÃmbÃ³licos para los registros -m31 Establece el formato del fichero al formato 31 bit -m64 Establece el formato del fichero al formato 64 bit los ops fueron: --32/--64/--x32 genera cÃ³digo 32bit/64bit/x32 --MD FICHERO escribe la informaciÃ³n de dependencias en el FICHERO (por defecto ninguno) --alternate activa inicialmente la sintaxis alternativa de macros --compress-debug-sections comprime las secciones de depuraciÃ³n DWARF con zlib --debug-prefix-map ANT=NUEVO mapea ANT en NUEVO en la informaciÃ³n de depuraciÃ³n --defsym SIM=VAL define el sÃmbolo SIM al valor dado --disp-size-default-22 el desplazamiento de ramificaciÃ³n de tamaÃ±o desconocido es de 22 bits (por defecto) --disp-size-default-32 el desplazamiento de ramificaciÃ³n de tamaÃ±o desconocido es de 32 bits --divide no trata `/' como un carÃ¡cter de comentario --divide se descarta --execstack requiere pila ejecutable para este objeto --fatal-warnings trata los avisos como errores --fix-v4bx Permite BX en cÃ³digo ARMv4 --gdwarf-2 genera informaciÃ³n de depuraciÃ³n DWARF2 --gstabs genera informaciÃ³n de depuraciÃ³n de STABS --gstabs+ genera informaciÃ³n de depuraciÃ³n de STABS con extensiones GNU --hash-size= establece el tamaÃ±o de la tabla de dispersiÃ³n cerca a --help muestra este mensaje y termina --itbl INSTTBL extiende el conjunto de instrucciones para incluir instrucciones que coincidan con las especificaciones definidas en el fichero INSTTBL --listing-cont-lines establece el nÃºmero mÃ¡ximo de lÃneas de continuaciÃ³n utilizadas para la columna de datos de salida del listado --listing-lhs-width establece la anchura en palabras de la columna de datos de salida en el listado --listing-lhs-width2 establece el ancho en palabras de las lÃneas de continuaciÃ³n de la columna de datos de salida; se descarta si es mÃ¡s pequeÃ±o que la anchura de la primera lÃnea --listing-rhs-width establece la anchura mÃ¡xima en caracteres de las lÃneas del fichero fuente --m32bit-doubles [por defecto] --m64bit-doubles --march= Genera cÃ³digo para . Las opciones vÃ¡lidas para son v0_v10, v10, v32 y common_v10_v32. --mbig-endian-data --mint-register= --mlittle-endian-data [por defecto] --mpid --mrelax --msmall-data-limit --muse-conventional-section-names --muse-renesas-section-names [por defecto] --no-underscore Los sÃmbolos de usuario no tienen ningÃºn prefijo. --nocompress-debug-sections no comprime las secciones de depuraciÃ³n DWARF --noexecstack no requiere pila ejecutable para este objeto --pic Activa la generaciÃ³n de cÃ³digo independiente de posiciÃ³n. --reduce-memory-overheads prefiere un menor uso de memoria al costo de tiempos de ensamblado mÃ¡s largos --size-check=[error|warning] revisar directiva .size de ELF (--size-check=error por defecto) --statistics muestra varias estadÃsticas medidas de la ejecuciÃ³n --strip-local-absolute remueve los sÃmbolos locales absolutos --target-help muestra las opciones especÃficas del objetivo --traditional-format Usa el mismo formato que el ensamblador nativo en lo posible --underscore Los sÃmbolos de usuario generalmente se preceden con subrayado. --version muestra el nÃºmero de versiÃ³n del ensamblador y termina --warn no suprime los avisos -D produce mensajes de depuraciÃ³n de ensamblador -EB ensambla cÃ³digo para un cpu big-endian -EB,-big produce cÃ³digo y datos big endian -EL genera cÃ³digo para el modo little endian (por defecto) -EB genera cÃ³digo para el modo big endian -mwarn-expand avisa si se expanden las pseudo operaciones -mxp activa el soporte para i860XP (desactivado por defecto) -mintel-syntax activa la sintaxis Intel (AT&T/SVR4 por defecto) -EL ensambla cÃ³digo para un cpu little-endian -EL,-little produce cÃ³digo y datos little endian -I DIR agrega DIR a la lista de bÃºsqueda para directivas .include -Ip sinÃ³nimo para -ignore-parallel-conflicts -J no avisa sobre desbordamiento con signo -K avisa cuando hay diferencias alteradas por desubicaciones largas -KPIC genera PIC -L,--keep-locals conserva los sÃmbolos locales (p.e. si inician con `L') -M,--mri ensambla en modo de compatibilidad MRI -N Avisa cuando las ramificaciones se expanden a saltos. -O intenta optimizar cÃ³digo. Implica -parallel -Q se descarta -Q se descarta -V muestra el nÃºmero de versiÃ³n del ensamblador -Q se descarta -V muestra el nÃºmero de versiÃ³n del ensamblador --32/--64 genera cÃ³digo 32bit/64bit -Q se descarta -V muestra el nÃºmero de versiÃ³n del ensamblador -k se descarta -R incorpora la secciÃ³n de datos en la secciÃ³n de texto -V muestra el nÃºmero de versiÃ³n del ensamblador -Qy, -Qn se descarta -W --no-warn suprime los avisos -Wnp sinÃ³nimo para -no-warn-explicit-parallel-conflicts -Wnuh sinÃ³nimo para -no-warn-unmatched-high -Wp sinÃ³nimo para -warn-explicit-parallel-conflicts -Wuh sinÃ³nimo para -warn-unmatched-high -X se descarta -Z genera el fichero objeto aÃºn despuÃ©s de errores -c muestra un aviso si se encuentra un comentario -f salta espacios en blanco y comentarios de preprocesamiento -fixed-special-register-names SÃ³lo permite los nombres de registros especiales originales. -g --gen-debug genera informaciÃ³n de depuraciÃ³n -globalize-symbols Hace que todos los sÃmbolos sean globales. -gnu-syntax Desactiva la compatibilidad con la sintaxis mmixal. -h, -H No ejecuta, muestra este texto de ayuda. Obsoleto. -ignore-parallel-conflicts no revisa cuando hay instrucciones paralelas -linker-allocated-gregs Si no hay una definiciÃ³n GREG adecuada para los operandos de una instrucciÃ³n, dejar resolver al enlazador. -m32r desactiva el soporte para el conjunto de instrucciones m32rx -m32r2 admite el conjunto extendido de instrucciones m32r2 -m32rx admite el conjunto extendido de instrucciones m32rx -mQ - permite la relajaciÃ³n en tiempo de ensamblado. Â¡PELIGROSO! -mP - permite las instrucciones polimÃ³rficas -mall-opcodes acepta todos los cÃ³digos de operaciÃ³n AVR, aÃºn si no lo admite el MCU -mno-skip-bug desactiva los avisos para las instrucciones que saltan dos palabras (por defecto para avr4, avr5) -mno-wrap rechaza las instrucciones rjmp/rcall con envoltura de 8K (por defecto para avr3, avr5) -march=ARQ permite instrucciones para la arquitectura ARQ -march=CPU[,+EXTENSIÃ“N...] genera cÃ³digo para el CPU y la EXTENSIÃ“N. CPU es uno de: -march=ms1-16-002 permite instrucciones ms1-16-002 (por defecto) -march=ms1-16-003 permite instrucciones ms1-16-003 -march=ms1-64-001 permite instrucciones ms1-64-001 -march=ms2 permite instrucciones ms2 -mavxscalar=[128|256] codifica las instrucciones AVX escalares con una longitud de vector especÃfica -mbig-endian genera cÃ³digo big-endian -mcpu= especifica el nombre del CPU objetivo -mdsbt el cÃ³digo usa direccionamiento DSBT -mextension activa el soporte de cÃ³digod de operaciÃ³n de extensiÃ³n -mfdpic ensambla para la ABI de FDPIC -mindex-reg admite registros de pseudo Ãndice -mip2022 restringe a insns de IP2022 -mip2022ext permite insns extendidas de IP2022 -mlittle-endian genera cÃ³digo little-endian -mmnemonic=[att|intel] usa mnemÃ³nicos AT&T/Intel -mnaked-reg no requiere el prefijo `%%' para los registros -mno-bcond17 desactiva la instrucciÃ³n b disp17 -mno-dsbt el cÃ³digo no usa direccionamiento DSBT -mno-fdpic/-mnopic desactiva -mfdpic -mno-pic el direccionamiento de cÃ³digo es dependiente de posiciÃ³n -mno-stld23 desactiva la instrucciÃ³n st/ld offset23 -mold-gcc admite versiones antiguas de gcc (<=2.8.1) -mpic el direccionamiento de cÃ³digo es independiente de posiciÃ³n -mpid=far el cÃ³digo usa direccionamiento de datos independiente de la posiciÃ³n, los accesos GOT usan el direccionamiento DP far -mpid=near el cÃ³digo usa direccionamiento de datos independiente de la posiciÃ³n, los accesos GOT usan el direccionamiento DP near -mpid=no el cÃ³digo usa direccionamiento de datos dependiente de la posiciÃ³n -mrelax Activa la relajaciÃ³n -msse-check=[none|error|warning] revisa las instrucciones SSE -msse2avx codifica instrucciones SSE con prefijo VEX -msyntax=[att|intel] usa sintaxis AT&T/Intel -mtune=CPU optimiza para el CPU, donde CPU es uno de: -mv850 El cÃ³digo estÃ¡ destinado para el v850 -mv850e El cÃ³digo estÃ¡ destinado para el v850e -mv850e1 El cÃ³digo estÃ¡ destinado para el v850e1 -mv850e2 El cÃ³digo estÃ¡ destinado para el v850e2 -mv850e2v3 El cÃ³digo estÃ¡ destinado para el v850e2v3 -mwarn-signed-overflow Avisa si los valores inmediatos con signo desbordan -mwarn-unsigned-overflow Avisa si los valores inmediato sin signo desbordan -n No optimiza la alineaciÃ³n de cÃ³digo -q omite algunos avisos -nIp sinÃ³nimo para -no-ignore-parallel-conflicts -no-bitinst desactiva las instrucciones extendidas de campos de bit de M32R2 -no-expand No expande GETA, ramificaciones, PUSHJ Ã³ JUMP a instrucciones mÃºltiples. -no-ignore-parallel-conflicts revisa cuando hay instrucciones paralelas -no-merge-gregs No mezcla las definiciones GREG con los valores cercanos. -no-parallel desactiva -parallel -no-predefined-syms No provee las constantes internas de mmixal. Implica -fixed-special-register-names. -no-warn-explicit-parallel-conflicts no avisa cuando las instrucciones -no-warn-unmatched-high no avisa cuando faltan reubicaciones low -nocpp se descarta -nosched desactiva las restricciones de calendarizaciÃ³n -o FICHOBJ nombra la salida del objeto fichero FICHOBJ (por defecto a.out) -parallel intenta combinar instrucciones en paralelo -relax Crea cÃ³digo relajable para el enlazador. -s se descarta -w se descarta -warn-explicit-parallel-conflicts avisa cuando hay instrucciones paralelas -warn-unmatched-high avisa cundo una reubicaciÃ³n (s)high no tiene una reubicaciÃ³n low correspondiente -x No avisa cuando no se sabe que un operando para GETA, una ramificaciÃ³n, PUSHJ Ã³ JUMP estÃ© dentro del rango. El enlazador atraparÃ¡ cualquier error. Implica -linker-allocated-gregs. -xauto borra las violaciones de dependencias automÃ¡gicamente (por defecto) -xnone desactiva la revisiÃ³n de violaciÃ³n de dependencias -xdebug depura el revisor de violaciÃ³n de dependencias -xdebugn depura el revisor de violaciÃ³n de dependencias pero desactiva la revisiÃ³n de violaciÃ³n de dependencias -xdebugx depura el revisor de violaciÃ³n de dependencias y activa la revisiÃ³n de violaciÃ³n de dependencias @FICHERO lee opciones del FICHERO %s; (Se requiere %s; la arquitectura solicitada es %s.) *input_line_pointer == '%c' 0x%02x Opciones de ensamblador especÃficas de ARM: Opciones de ensamblador especÃficas de Blackfin: Opciones de lÃnea de Ã³rdenes especÃficas de FR30: Ensamblador de GNU versiÃ³n %s (%s) utilizando BFD versiÃ³n %s. No se estableciÃ³ la ranura insn en el registro de desenredo.Opciones de la lÃnea de Ã³rdenes especÃficas de M32C: Opciones de la lÃnea de Ã³rdenes especÃficas de M32R: Opciones de la lÃnea de Ã³rdenes especÃficas de MMIX: Opciones de lÃnea de Ã³rdenes especÃficas de RX: Opciones de ensamblador especÃficas de Score: Opciones de V850: Opciones de la lÃnea de Ã³rdenes especÃficas de XC16X: Opciones de lÃnea de Ã³rdenes especÃficas de XSTROMY16: Opciones de Z8K: -z8001 genera cÃ³digo segmentado -z8002 genera cÃ³digo sin segmentar -linkrelax crea cÃ³digo relajable por el enlazador la reubicaciÃ³n de ramificaciÃ³n trunca (0x%x) [-2^9 ~ 2^9] la reubicaciÃ³n de ramificaciÃ³n trunca (0x%x) [-2^19 ~ 2^19] la reubicaciÃ³n de ramificaciÃ³n trunca (0x%x) [-2^9 ~ 2^9]!%s no utiliza un nÃºmero de secuenciareubicaciÃ³n !samegp contra un sÃmbolo sin .prologue: %s"%d" (nÃºmero de instancia %d de una etiqueta %s)".else" sin un ".if" coincidente".elseif" despuÃ©s de ".else"".elseif" sin un ".if" coincidente".endif" sin ".if"la directiva ".option" tiene conflictos con la definiciÃ³n inicialla directiva ".option" debe aparecer antes de cualquier instrucciÃ³nla directiva opciÃ³n ".option" sobreescribe el valor (por defecto) de la lÃnea de Ã³rdenes# Ejemplo de las instrucciones `%s' .sect .text _start: # prohibe el registro# tiene conflictos con la longitud#4 no es vÃ¡lido en H8/300###no se admite $DPR_BYTE en este contextono se admite $DPR_GOT en este contextono se admite $DPR_HWORD en este contextono se admite $DPR_WORD en este contexto$DSBT_INDEX se debe usar con __c6xabi_DSBT_BASEno se admite $DSBT_INDEX en este contextono se admite $GOT en este contextono se admite $PCR_OFFSET en este contexto$dbg y $depc estÃ¡n desactivados cuando DEBUG estÃ¡ apagado$hi y $lo estÃ¡n desactivados cuando MUL y DIV estÃ¡n apagados$mb0, $me0, $mb1 y $me1 estÃ¡n desactivados cuando COP estÃ¡ apagadoel operador % necesita una expresiÃ³n absoluta%d errore%s, %d aviso%s, se genera un fichero objeto errÃ³neo%d errore%s, %d aviso%s, no se genera un fichero objeto%d avisos, se tratan los avisos como errores%s %s (%08lx %08lx) despuÃ©s de %s (%08lx %08lx)%s -- `%s'%s -- se descarta la declaraciÃ³n `%s'ISA %s no admite DSP ASEISA %s no admite DSP R2 ASEISA %s no admite MCU ASEISA %s no admite MT ASEISA %s no admite SmartMIPSISA %s no admite SmartMIPS ASE%s NOP insertados%s `%s' ya tiene un alias `%s'el argumento %s debe ser una cadena%s para `%s'instrucciÃ³n %s, el operando %d no coincideisa %s no admite registros de coma flotante de 64-bitisa %s no admite registros de 64-bit%s no puede ocupar la ranura de retardo de otra insn de ramificaciÃ³n.%s debe tener un valor constante%s fuera de dominio (%d no es un mÃºltiplo de %d)%s fuera de rango (%d no estÃ¡ entre %d y %d)%s fuera de rango (0x%s no estÃ¡ entre 0x%s y 0x%s)el registro %s es el mismo que la base de escritura-hacia-atrÃ¡slas reubicaciones %s no caben en %d bytes%s reubicaciones no caben en %d bytes %s reducido a %sLa recursiÃ³n del sÃmbolo %s se detuvo en la segunda apariciÃ³n de '%s'no se admite %s%s sin %s%s: tamaÃ±o de datos %ld %s: no se admiten los sÃmbolos globales en las secciones comunes%s: no existe tal secciÃ³n%s: la salida de la 1a instrucciÃ³n es la misma que una entrada a la 2a instrucciÃ³n - Â¿Esto es intencional?%s: la salida de la 2a instrucciÃ³n es la misma que una entrada a la 1a instrucciÃ³n - Â¿Esto es intencional?%s: tiempo total en ensamblado: %ld.%06ld %s: tipo de funciÃ³n inesperado: %d%s: no se reconoce el nombre de procesador%s: cerrarÃa el ciclo weakref: %s%s:%u: devoluciÃ³n errÃ³nea de bfd_install_relocation: %xla reubicaciÃ³n de %u-bytes no se puede aplicar al campo %u-bytesla instrucciÃ³n '%.*s' no estÃ¡ al inicio del paquete de ejecuciÃ³nla instrucciÃ³n '%.*s' no estÃ¡ en un ciclo entubado por softwarela instrucciÃ³n '%.*s' no se admite en esta arquitecturala instrucciÃ³n '%.*s' no se admite en esta unidad funcionalla instrucciÃ³n '%.*s' no se admite en esta unidad funcional para esta arquitectura'%s' no se puede repetir. El comportamiento resultante no estÃ¡ definido.'%s' sÃ³lo estÃ¡ disponible en DD2.0 o superior.'%s 'no se puede agrupar con otras instrucciones.'%s': solamente las instrucciones NOP se puede ejecutar en paralelo en el m32rse requiere ')'se esperaba ','se esperaba 'APSR', 'CPSR' o 'SPSR'se requiere 'ASR'se requiere 'LSL' o 'ASR'se requiere 'LSL''MFC_RdTagMask' (canal 12) sÃ³lo estÃ¡ disponible en DD2.0 o superior.'SPU_RdEventMask' (canal 11) sÃ³lo estÃ¡ disponible en DD2.0 o superior.se esperaba '['se esperaba '[' despuÃ©s del mnemÃ³nico PLDse esperaba '[' despuÃ©s del mnemÃ³nico PLIse esperaba ']''d.%s' se debe alinear a 8-bytes'entry_num' debe ser un nÃºmero absoluto en [0,31]'||' despuÃ©s del predicado'||' no estÃ¡ seguido por una instrucciÃ³n'||^' sin un SPMASK previose esperaba '}' al final del campo 'option'(PC)+ impredecible(plt) sÃ³lo es vÃ¡lido en objetivos ramas(razÃ³n desconocida)*-%s tiene conflictos con las otras opciones de arquitectura, las cuales implican -%s-(PC) impredecible-- cadena sin terminar--abi=[32|64] establece el tamaÃ±o de los operandos SHmedia expandidos y el tipo del fichero objeto --shcompact-const-crange emite descriptores de cÃ³digo-rango para constantes en las secciones de cÃ³digo SHcompact --no-mix desactiva el cÃ³digo SHmedia en la misma secciÃ³n que las constantes y el cÃ³digo SHcompact --no-expand no expande las instrucciones MOVI, PT, PTA Ã³ PTB --expand-pt32 con -abi=64, expande las instrucciones PT, PTA y PTB solamente a 32 bits la opciÃ³n --absolute-literals no se admite en esta configuraciÃ³n Xtensase descarta la opciÃ³n --density--fdpic genera un fichero objeto FDPIC --generics es obsoleto; utilice en su lugar --transformno se admite --gstabs para ia64--hash-size necesita un argumento numÃ©rico--isa=[shmedia establece el conjunto de instrucciones por defecto para SH64 | SHmedia | shcompact | SHcompact] se descarta la opciÃ³n --no-density--no-generics es obsoleto; utilice en su lugar --no-transform--no-relax es obsoleto; utilice en su lugar --no-transform--no-underscore es invÃ¡lido con el formato a.out--nops necesita un argumento numÃ©rico--pic es invÃ¡lido en este formato de objeto--relax es obsoleto; utilice en su lugar --transform-32 crea ficheros objeto de 32 bits -64 crea ficheros objeto de 64 bits -32 crea ficheros objeto ABI o32 (por defecto) -n32 crea ficheros objeto ABI o32 -64 crea ficheros objeto ABI 64 -64 sÃ³lo se admite en el formato ELF-EL genera cÃ³digo para una mÃ¡quina little endian -EB genera cÃ³digo para una mÃ¡quina big endian --little-endian-data genera cÃ³digo para una mÃ¡quina que tenga instrucciones big endian y datos little endian. -G no se puede usar en cÃ³digo independiente de posiciÃ³n-G no se puede utilizar con cÃ³digo PIC de SVR4-G n Coloca datos <= n bytes en el Ã¡rea de datos small -G no se admite en esta configuraciÃ³n.-KPIC genera PIC -V muestra el nÃºmero de versiÃ³n del ensamblador -undeclared-regs descarta el uso del registro global de aplicaciones sin la directiva .register apropiada (por defecto) -no-undeclared-regs fuerza un error en el uso del registro global de aplicaciones sin una directiva .register apropiada -q se descarta -Qy, -Qn se descarta -s se descarta -KPIC, -call_shared genera cÃ³digo SVR4 independiente de posiciÃ³n -call_nonpic genera cÃ³digo que no es PIC interoperable con DSOs -mvxworks-pic genera cÃ³digo VxWorks independiente de posiciÃ³n -non_shared no genera cÃ³digo independiente de posiciÃ³n -xgot asume un GOT de 32 bit -mpdr, -mno-pdr activa/desactiva la creaciÃ³n de secciones .pdr -mshared, -mno-shared desactiva/activa la optimizaciÃ³n .cpload para cÃ³digo que no es compartido -mabi=ABI crea un fichero objeto que cumple con el ABI para: No se admite la opciÃ³n -R en este objetivo.-TSO usa el Ordenamiento de Almacenamiento Total -PSO usa el Ordenamiento de Almacenamiento Parcial -RMO usa el Ordenamiento de Memoria Relajado -call_nonpic sÃ³lo se admite en el formato ELF-call_shared sÃ³lo se admite en el formato ELF-expand-pt32 es invÃ¡lido junto con -no-expand-expand-pt32 sÃ³lo es vÃ¡lido con -abi=64-k genera PIC -l usa 1 word para referencias a sÃmbolos indefinidos [por defecto 2] -pic, -k genera cÃ³digo independiente de posiciÃ³n -S convierte jbsr en jsr --pcrel nunca convierte ramificaciones relativas al PC en saltos absolutos --register-prefix-optional reconoce los nombres de registro sin carÃ¡cter de prefijo --bitwise-or no trata `|' como un carÃ¡cter de comentario --base-size-default-16 registro base sin tamaÃ±o es 16 bits --base-size-default-32 registro base sin tamaÃ±o es 32 bits (por defecto) --disp-size-default-16 desplazamiento con tamaÃ±o desconocido es 16 bits --disp-size-default-32 desplazamiento con tamaÃ±o desconocido es 32 bits (por defecto) -mCPU equivalente a -march=CPU -mtune=CPU. Obsoleto. -no-mCPU no genera cÃ³digo especÃfico para el CPU. Para -mCPU y -no-mCPU, CPU debe ser uno de: -mPIC Marca el fichero generado para usar cÃ³digo independiente de posiciÃ³n large -m[no-]%-16s activa/desactiva la extensiÃ³n de arquitectura%s -mabi sÃ³lo se admite en el formato ELF-maltivec genera cÃ³digo para AltiVec -mvsx genera cÃ³digo para instrucciones Vector-Escalar (VSX) -me300 genera cÃ³digo para la familia PowerPC e300 -me500, -me500x2 genera cÃ³digo para el nÃºcleo complejo Motorola e500 -me500mc, genera cÃ³digo para el nÃºcleo complejo Freescale e500mc -me500mc64, genera cÃ³digo para el nÃºcleo complejo Freescale e500mc64 -mspe genera cÃ³digo para las instrucciones Motorola SPE -mtitan genera cÃ³digo para el nÃºcleo complejo Titan AppliedMicro -mregnames Permite nombres simbÃ³licos para los registros -mno-regnames No permite nombres simbÃ³licos para los registros -march=%s no es compatible con la ABI seleccionada-march= define la arquitectura -mcpu= define el cpu [por defecto %s] -mcpu= Especifica la versiÃ³n del CPU -mcpu={fr500|fr550|fr400|fr405|fr450|fr300|frv|simple|tomcat} -mdouble Marca el fichero generado para usar insns FP de doble precisiÃ³n -mdsp genera instrucciones DSP -mno-dsp no genera instrucciones DSP -mdspr2 genera instrucciones DSP R2 -mno-dspr2 no genera instrucciones DSP R2 -mdword Marca el fichero generado para usar alineaciÃ³n de pila de 8-bytes -me Redirige los errores a un fichero -merrors-to-file -mfar-mode | -mf Utiliza direccionamiento extendido -mfdpic Ensambla para la ABI de FDPIC -mfix-loongson2f-jump evita las instrucciones JUMP de Loongson2F -mfix-loongson2f-nop evita los errores NOP de Loongson2F -mfix-vr4120 evita ciertos errores de VR4120 -mfix-vr4130 evita los errores mflo/mfhi de VR4130 -mfix-24k inserta un nop despuÃ©s de las instrucciones ERET y DERET -mfix-cn63xxp1 evita los errores PREF de CN53XXP1 -mgp32 usa GPRs de 32-bit, sin importar el ISA escogido -mfp32 usa FPRS de 32-bit, sin importar el ISA escogido -msym32 asume que todos los sÃmbolos tiene valores de 32-bit -O0 elimina NOPs innecesarios, no intercambia ramificaciones -O elimina NOPs innecesarios e intercambia ramificaciones --trap, --no-break excepciÃ³n trap en div por 0 y desbordamiento de mult --break, --no-trap excepciÃ³n break en div por 0 y desbordamiento de mult se utilizÃ³ -mfp32 con -mdmxse utilizÃ³ -mfp32 con -mips3dse utilizÃ³ -mfp32 con un ABI de 64-bitse utilizÃ³ -mfp64 con un ABI de 32-bitse utilizÃ³ -mfp64 con un fpu de 32-bit-mfpr-32 Marca el fichero generado para sÃ³lo usar 32 FPRs -mfpr-64 Marca el fichero generado para usar todos los 64 FPRs se utilizÃ³ -mgp32 con un ABI de 64-bitse utilizÃ³ -mgp64 con un ABI de 32-bitSe utilizÃ³ -mgp64 con un procesador de 32-bit-mgpr-32 Marca el fichero generado para sÃ³lo usar 32 GPRs -mgpr-64 Marca el fichero generado para usar todos los 64 GPRs -mhard-float permite instrucciones de coma flotante -msoft-float no permite instrucciones de coma flotante -msingle-float sÃ³lo permite operaciones de coma flotante de 32 bits -mdouble-float permite operaciones de coma flotante de 32 y 64 bits --[no-]construct-floats [des]activa valores de coma flotante a construir -mips1 genera instrucciones MIPS ISA I -mips2 genera instrucciones MIPS ISA II -mips3 genera instrucciones MIPS ISA III -mips4 genera instrucciones MIPS ISA IV -mips5 genera instrucciones MIPS ISA V -mips32 genera instrucciones MIPS32 ISA -mips32r2 genera instrucciones MIPS32 versiÃ³n 2 ISA -mips64 genera instrucciones MIPS64 ISA -march=CPU/-mtune=CPU genera cÃ³digo/calendarizaciÃ³n para el CPU, donde CPU es uno de: -mips16 genera instrucciones mips16 -no-mips16 no genera instrucciones mips16 -mips16 no se puede usar con -micromips-mlibrary-pic Marca el fichero generado para usar cÃ³digo independiente de posiciÃ³n para bibliotecas -mmcu genera instrucciones MCU -mno-mcu no genera instrucciones MCU -mmedia Marca el fichero generado para usar insns media -mmicromips genera instrucciones microMIPS -mno-micromips no genera instrucciones microMIPS -mmicromips no se puede usar con -mips16-mmt genera instrucciones MT -mno-mt no genera instrucciones MT -mmuladd Marca el fichero generado para usar insns adiciÃ³n/sustracciÃ³n mÃºltiples -mno-dword Marca el fichero generado para usar una alineaciÃ³n de pila de 4-bytes -mno-pack No permite que se empaqueten las instrucciones -mnopic Desactiva -mpic, -mPIC, -mlibrary-pic y -mfdpic -mpack Permite que se empaqueten las instrucciones -mpic Marca el fichero generado para usar cÃ³digo independiente de posiciÃ³n small -mppc64, -m620 genera cÃ³digo para PowerPC 620/625/630 -mppc64bridge genera cÃ³digo para PowerPC 64, incluyendo instrucciones puente -mbooke genera cÃ³digo para PowerPC BookE de 32-bit -ma2 genera cÃ³digo para la arquitectura A2 -mpower4, -mpwr4 genera cÃ³digo para la arquitectura Power4 -mpower5, -mpwr5, -mpwr5x genera cÃ³digo para la arquitectura Power5 -mpower6, -mpwr6 genera cÃ³digo para la arquitectura Power6 -mpower7, -mpwr7 genera cÃ³digo para la arquitectura Power7 -mcell genera cÃ³digo para la arquitectura Cell Broadband Engine -mcom genera cÃ³digo de instrucciones comunes Power/PowerPC -many genera cÃ³digo para cualquier arquitectura (PWR/PWRX/PPC) -mrelocatable admite la opciÃ³n -mrelocatble de GCC -mrelocatable-lib admite la opciÃ³n -mrelocatble-lib de GCC -memb activa el bit PPC_EMB en las opciones ELF -mlittle, -mlittle-endian, -le genera cÃ³digo para una mÃ¡quina little endian -mbig, -mbig-endian, be genera cÃ³digo para una mÃ¡quina big endian -msolaris genera cÃ³digo para Solaris -mno-solaris no genera cÃ³digo para Solaris -K PIC activa EF_PPC_RELOCATABLE_LIB en las opciones ELF -V muestra el nÃºmero de versiÃ³n del ensamblador -Qy, -Qn se descarta -msmartmips genera instrucciones smartmips -no-smartmips no genera instrucciones smartmips -msoft-float Marca el fichero generado para usar FP de software -mtomcat-debug Depura las alternativas de tomcat -mtomcat-stats Muestra estadÃsticas para las alternativas de tomcat -n32 sÃ³lo se admite en el formato ELF-no-expand sÃ³lo es vÃ¡lido con SHcompact o SHmedia-no-mix es invÃ¡lido sin especificar SHcompact o SHmedia-non_shared sÃ³lo se admite en el formato ELF-nops=cuenta al alinear, mÃ¡s de CUENTA nops usa una ramificaciÃ³n -shcompact-const-crange es invÃ¡lido sin SHcompact.%s fuera de .%s...Â¡Longitud .COMMÃºn (%d.) < 0! Se descarta.Â¡Longitud de .COMM (%ld.) <0! Se descarta.se descarta la longitud .COMMÃºn (%lu) fuera de rango.EQU debe usar una etiqueta.EXIT debe aparecer dentro de un procedimientola expresiÃ³n .REG debe ser un registro.REG debe usar una etiquetaÂ¡Longitud SCOMMon (%ld.) <0! Se descarta.se detectÃ³ .abort. Se abandona la nave..arch requiere una opciÃ³n --march=... coincidentese descarta .begin [no-]densitydirectiva .begin sin una directiva .end coincidentedirectiva .begin sin una directiva .ent precedentedirectiva .begin sin una directiva .file precedenteEl uso de .begin literal es obsoleto. Utilice en su lugar .literal.begin/.bend en segmentos diferentessÃmbolo desconocido en los nombres de la directiva .benddirectiva .bend sin una directiva .ent precedentedirectiva .bend sin una directiva .file precedenteÂ¡TamaÃ±o de .bss %d < 0!Â¡TamaÃ±o de .bss %ld < 0!Falta el tamaÃ±o del argumento .bss .callinfo no estÃ¡ dentro de una definiciÃ³n de procedimiento.cfi_endproc sin un .cfi_startproc correspondiente.cfi_lsda requiere argumentos de codificaciÃ³n y sÃmbolo.cfi_personality requiere argumentos de codificaciÃ³n y sÃmbolofalta el lenguaje y la versiÃ³n en la directiva .compilerfalta la versiÃ³n en la directiva .compiler.cpload no estÃ¡ en la secciÃ³n noreorderse usÃ³ el pseudo-operador .def dentro de .def/.endef: se descarta.se utiliza el pseudo-operador .def dentro de .def/.endef; se descartase usÃ³ el pseudo-operador .dim fuera de .def/.endef: se descarta.se utiliza el pseudo-operador .dim fuera de .def/.endef; se descarta.ef sin un .function precedentese descarta .end [no-]densityla directiva .end no tiene nombrefalta la directiva .end o hay un sÃmbolo desconocidola directiva .end nombra un sÃmbolo diferente de .entsÃmbolo desconocido en los nombres de la directiva .enddirectiva .end sin una directiva .ent precedentedirectiva .end sin una directiva .ent precedente.directiva .end sin una directiva .file precedentedirectiva .end sin una directiva .ent coincidente.end no estÃ¡ en la secciÃ³n textel sÃmbolo .end no coincide con el sÃmbolo .ent.se encontrÃ³ .end%c sin un %s precedente.end%s sin un .%s precedentese utiliza el pseudo-operador .endef antes de .def; se descartase usÃ³ el pseudo-operador .endef fuera de .def/.endef: se descarta.falta un .endfunc para el .func previofalta un .endfunc para el .proc previola directiva .ent no tiene nombrela directiva .ent no tiene sÃmbolodirectiva .ent sin una directiva .end coincidente.ent o .aent no estÃ¡n en la secciÃ³n text.se encontrÃ³ .errse invocÃ³ la directiva .error en el fichero fuente.es sin un .bs precedentese encontrÃ³ .fail %ldla cuenta de .field '%d' estÃ¡ fuera de rango (1 <= X <= 32)el tamaÃ±o de fill se restringe a %d.fmask fuera de .entdirectiva .fnend sin .fnstart.frame fuera de .entla directiva .handler no tiene nombreerror sintÃ¡ctico en .ifeqsla cuenta .incbin es cero, se descarta `%s'el operando de .inst.n es demasiado grande. Use en su lugar .inst.w.largecomm sÃ³lo se admite en modo de 64bit, se produce .comm.linkonce no se admite en este formato de fichero objeto.literal no se permite dentro de una regiÃ³n .begin literal.literal_position dentro de una directiva literal; se descartapseudo-operador .ln dentro de .def/.endef: se descarta..loc antes de .file.loc fuera de .textpseudo-operador .loc dentro de .def/.endef: se descarta.se vio el pseudo-operador .longcall cuando no se estaba relajandose vio el pseudo-operador .longjump cuando no se estaba relajando.ltorg en la secciÃ³n %s emparejado con .using en la secciÃ³n %s.ltorg sin .using previo en la secciÃ³n %sdesbordamiento de pila en .machinedesbordamiento por debajo de la pila en .machine.mask fuera de .ent.mask/.fmask fuera de .entla directiva .name no tiene sÃmbolola directiva .name no estÃ¡ en la secciÃ³n de enlace (.link)No se admite .option pic%dla directiva .pdesc no tiene un sÃmbolo de entradala directiva .pdesc no estÃ¡ en la secciÃ³n de enlace (.link).pdesc no coincide con el Ãºltimo .ent.pdesc tiene un sÃmbolo de entrada errÃ³neo.popsection sin .pushsection correspondiente; se descarta.previous sin .section correspondiente; se descartael pseudo .profiler requiere por lo menos dos operandos.directiva .prolog sin una directiva .ent precedente.prologue dentro del prÃ³logo.ref fuera de .csect.sblock se puede utilizar Ãºnicamente para secciones inicializadasse descarta el pseudo-operador .scl que se usÃ³ fuera de .def/.endef.se utiliza el pseudo-operador .scl fuera de .def/.endef; se descarta.sect: se ignora el nombre de la subsecciÃ³n.set pop sin .set pushsintaxis de .set invÃ¡lida la expresiÃ³n .size para %s no evalÃºa a una constantese descarta el pseudo-operador .size que se usÃ³ fuera de .def/.endef.se utiliza el pseudo-operador .size fuera de .def/.endef; se descarta.space Ã³ .fill con valor negativo, se descartala cuenta de repeticiÃ³n .space es negativa, se descartala cuenta de repeticiÃ³n .space es cero, se descarta.space especifica un valor que no es absolutoLa cuenta de repeticiÃ³n .space/.bes es negativa, se descartaLa cuenta de repeticiÃ³n .space/.bes es cero, se descartano se admite .stab%c.stab%c: la descripciÃ³n del campo '%x' es demasiado grande, intente un formato de depuraciÃ³n diferente.stab%c: se descarta el otro campo que no es cero.stab%c: falta una coma.stabx de la clase de almacenamiento stsym debe estar entre .bs/.es.syntax %s requiere de la opciÃ³n de lÃnea de Ã³rdenes `--no-underscore'.syntax %s requiere de la opciÃ³n de lÃnea de Ã³rdenes `--underscore'se descarta el pseudo-operador .tag que se usÃ³ fuera de .def/.endef.se utiliza el pseudo-operador .tag fuera de .def/.endef; se descarta.tag requiere una estructura tagel objetivo .tag '%s' no estÃ¡ definido.tc no estÃ¡ en la secciÃ³n .toc.tc sin etiquetase descarta el pseudo-operador .type que se usÃ³ fuera de .def/.endef.se utiliza el pseudo-operador .type fuera de .def/.endef; se descarta.unwind_save no admite este tipo de registro.usect: se descarta la opciÃ³n de alineaciÃ³n que no es cerola directiva .usepv no tiene nombrela directiva .usepv no tiene tipo.uses no se refiere a un sÃmbolo local en la misma secciÃ³nse vio el pseudo-operador .uses cuando no se estaba relajandoel objetivo .uses no se refiere a un sÃmbolo local en la misma secciÃ³n.using: la expresiÃ³n de direcciÃ³n base es ilegal o demasiado complejala expresiÃ³n .val es demasiado complejase descarta el pseudo-operador .val que se usÃ³ fuera de .def/.endef.se utiliza el pseudo-operador .val fuera de .def/.endef; se descarta.var solamente se puede usar dentro de una definiciÃ³n de macro.vframepsp no tiene significado, se asume que se querÃa .vframesp.vliw no estÃ¡ disponible cuando VLIW estÃ¡ desactivado.se invocÃ³ la directiva .warning en el fichero fuenteno cabe .word %s-%s+%sFallÃ³ el manejo de la tabla de case .word: la tabla es demasiado grande0x%lx fuera de rango del desplazamiento de 32 bit con signo0x%lx: "%s" tipo = %ld, clase = %d, segmento = %d salto de 16-bit fuera de rangoinmediato de 3-bit fuera de rangose generÃ³ una ramificaciÃ³n condicional de 32-bitno se admite el modo de 32bit en `%s'.x86_64 de 32bit sÃ³lo se admite para ELFno se admiten las instrucciones microMIPS de 48-bitel campo de 5-bit debe ser absolutoel inmediato de 5-bit es demasiado grandeDesubicaciÃ³n de 6-bit fuera de rangoinmediato de 6-bit fuera de rangola reubicaciÃ³n de 62-bits aÃºn no estÃ¡ implementadano se admite el modo de 64bit en `%s'.se especificaron 68040 y 68851; las instrucciones mmu podrÃan ensamblar incorrectamenteinstrucciÃ³n de 8 bytes en ranura de retardoinstrucciÃ³n de salto de 8 bytes con ranura de retardoDesubicaciÃ³n de 8-bit fuera de rangoinmediato de 8-bit fuera de rango: el operando relativo a PC no puede ser una constante: el operando TLS no puede ser una constante: Solamente hay 32 registros f; [0-31]: Solamente hay 32 registros f de precisiÃ³n sencilla; [0-31]: Solamente hay 64 registros f; [0-63]: el nÃºmero asr debe estar entre 0 y 31: el nÃºmero asr debe estar entre 16 y 31: se esperaba %asrN: expresiÃ³n ASI invÃ¡lida: nombre ASI invÃ¡lido: nÃºmero ASI invÃ¡lido: nombre cpreg invÃ¡lido: expresiÃ³n de mÃ¡scara membar invÃ¡lida: nombre de mÃ¡scara membar invÃ¡lido: nÃºmero de mÃ¡scara membar invÃ¡lido: expresiÃ³n de funciÃ³n de precargado invÃ¡lida: nombre de funciÃ³n de precargado invÃ¡lido: nÃºmero de funciÃ³n de precargado invÃ¡lido: expresiÃ³n de modo siam invÃ¡lida: nÃºmero de modo siam invÃ¡lido: rd en registro de estado ancilar de sÃ³lo escritura: no se reconoce el registro hiperprivilegiado: no se reconoce el registro privilegiado: no se reconoce el registro de estado ancilar v9a: no se reconoce el registro de estado ancilar v9a o v9bno se permite :b; se cambia por defecto a :w:lower16: no se permite esta instrucciÃ³n:upper16: no se permite esta instrucciÃ³n:upper16: no se permite esta instrucciÃ³n ensambla para la ABI de coma flotante ensambla para la arquitectura ensambla para el CPU ensambla para la arquitectura de Unidad de Coma Flotante ,X controla la inserciÃ³n implÃcita de instrucciones IT ensambla para la eabi versiÃ³n se descarta la opciÃ³n de secciÃ³n ? con G presenteno se admiten las reubicaciones @%s con el formato de salida de %d bitsel destino de la ramificaciÃ³n @local o @plt estÃ¡ demasiado lejos, %ld bytes@tls no se puede utilizar con operandos "%s"@tls sÃ³lo se puede utilizar en el Ãºltimo operandoUn nÃºmero grande/de coma flotante no puede ser una desubicaciÃ³n: se usa 0x%lxUn desplazamiento de ramificaciÃ³n requiere alineaciÃ³n 0 MOD 4Se debe proporcionar un registro destinoYa se habÃa especificado un %s diferente, ahora es %sYa existe un parÃ¡metro llamado `%s' para la macro `%s'Se requiere un registro de estado o un nombre de bit de estadoAAARG -> reubicaciÃ³n de constante sin manejarse utiliza ADRL para un sÃmbolo que no estÃ¡ definido en el mismo ficheroAR %d sÃ³lo se puede acceder por %c-unitNo se encontrÃ³ el registro AR en la referencia indirectase esperaba un registro ARMOpciones de AVR: -mmcu=[nombre-avr] selecciona la variante de microcontrolador [nombre-avr] puede ser: avr1 - nÃºcleo AVR clÃ¡sico sin RAM de datos avr2 - nÃºcleo AVR clÃ¡sico hasta con 8K de memoria de programa avr25 - nÃºcleo AVR clÃ¡sico hasta con 8K de memoria de programa mÃ¡s la instrucciÃ³n MOVW avr3 - nÃºcleo AVR clÃ¡sico hasta con 64K de memoria de programa avr31 - nÃºcleo AVR clÃ¡sico hasta con 128K de memoria de programa avr35 - nÃºcleo AVR clÃ¡sico hasta con 64K de memoria de programa mÃ¡s la instrucciÃ³n MOVW avr4 - nÃºcleo AVR mejorado hasta con 8K de memoria de programa avr5 - nÃºcleo AVR mejorado hasta con 64K de memoria de programa avr51 - nÃºcleo AVR mejorado hasta con 128K de memoria de programa avr6 - nÃºcleo AVR mejorado hasta con 256K de memoria de programa avrxmega3 - XMEGA, > 8K, <= 64K FLASH, > 64K RAM avrxmega4 - XMEGA, > 64K, <= 128K FLASH, <= 64K RAM avrxmega5 - XMEGA, > 64K, <= 128K FLASH, > 64K RAM avrxmega6 - XMEGA, > 128K, <= 256K FLASH, <= 64K RAM avrxmega7 - XMEGA, > 128K, <= 256K FLASH, > 64K RAM o el nombre inmediato del microcontrolador Se aborta porque la declaraciÃ³n tiene "%s"Valor relativo a PC absoluto en cÃ³digo de relajaciÃ³n. Error de ensamblador.....Valor absoluto en cÃ³digo de relajaciÃ³n. Error de ensamblador.....Se accede `%s' como un objeto de hilo localSe accede a la funciÃ³n `%s' como un objeto de hilo localLa adiciÃ³n para un sÃmbolo sin resolver no estÃ¡ en un lÃmite de word.El modo de direcciÃ³n *+ARx no se permite en el direccionamiento de registros mapeados en memoria. El comportamiento resultante no estÃ¡ definido.El modo de direcciÃ³n *+ARx es de sÃ³lo escritura. El resultado de la lectura estÃ¡ indefinido.DirecciÃ³n del operando inmediatoModo de direccionamiento aÃºn sin implementar.El .word (%ld) con signo ajustado se desborda: la sentencia `switch' es demasiado grande.La alineaciÃ³n debe ser una potencia de 2AlineaciÃ³n negativa: se asume 0AlineaciÃ³n negativa: se asume 0.AlineaciÃ³n demasiado grande: se asume %dAlineaciÃ³n demasiado grande: se asume %d.AlineaciÃ³n demasiado grande: se asume %d.Opciones Alpha: -32addr trata direcciones como valores de 32-bit -F falta el soporte de instrucciones de coma flotante -mev4 | -mev45 | -mev5 | -mev56 | -mpca56 | -mev6 | -mev67 | -mev68 | -mall especifica variante de la arquitectura Alpha -m21064 | -m21066 | -m21164 | -m21164a | -m21164pc | -m21264 | -m21264a | -m21264b estas variantes incluyen cÃ³digos de operaciÃ³n PALcode Una instrucciÃ³n IMM no debe estar presente en el fichero .sSe expandiÃ³ una instrucciÃ³n (%s)No coincide la arquitectura en "%s".Las variantes de arquitectura son: El argumento para .BLOCK/.BLOCKZ debe estar entre 0 y 0x3fffffffSe descarta el argumento para .evenEl ensamblador aÃºn no admite PICMensajes del ensamblador: Falla de afirmaciÃ³n en %s lÃnea %d. Falla de afirmaciÃ³n en %s en %s lÃnea %d. Se esperaba al menos un argumento PRSe esperaban al menos dos argumentos PRse intentÃ³ purgar la macro inexistente `%s'Se intentÃ³ poner un sÃmbolo comÃºn en el conjunto %sSe intentÃ³ poner un sÃmbolo indefinido en el conjunto %sSe intenta redefinir el conjunto de registros `%s'No se reconoce el nombre del atributo: %sEl auto incremento/decremento del desplazamiento '%ld' estÃ¡ fuera de rango.Se requiere un registro auxiliar AR0--AR7 para el indirectoEl inmediato BALING no es 1 o 3 (%lu)BSPEC ya estÃ¡ activo. No se admite el anidamiento.BSPEC sin un ESPEC.se descarta la longitud BSS (%d) <0Â¡Longitud BSS (%d.) <0! Se descarta.la expresiÃ³n BYTE no es un nÃºmero purola expresiÃ³n BYTE no estÃ¡ en el rango 0..255Directiva .fmask errÃ³neaDirectiva .frame errÃ³neaParÃ¡metro 1./2. de directiva .frame errÃ³neoParÃ¡metro 3./4. de directiva .frame errÃ³neoDirectiva .mask errÃ³neaDirectiva .mask/.fmask errÃ³neaVersiÃ³n COFF '%s' errÃ³neaVersiÃ³n de CPU '%s' errÃ³neaRegistro base errÃ³neo, se usa $%d.Llamada errÃ³nea a MD_NTOF()Llamada errÃ³nea a md_atof ()Llamada errÃ³nea a md_atof () - no se admiten los formatos de coma flotanteCarÃ¡cter errÃ³neo = '%c' ConstrucciÃ³n de direccionamiento directo %s errÃ³neaDesplazamiento %d errÃ³neo (se requiere 0--255) Selector de elemento %ld errÃ³neoConstante de coma flotante errÃ³nea: %sTabla de cÃ³digos de operaciÃ³n errÃ³nea, ensamblador descompuesto.OpciÃ³n-de-tabla-de-cÃ³digos-de-operaciÃ³n errÃ³nea, revise en el fichero ns32k-opcode.hOperando errÃ³neoOperando errÃ³neo para una instrucciÃ³n load <%s>Operando errÃ³neo para una instrucciÃ³n store <%s>Valor de operando errÃ³neo: %sLista de parÃ¡metros errÃ³nea para la macro `%s'Nombre de registro errÃ³neoNombre de registro r%s errÃ³neoRango de registro errÃ³neoTipo de compostura de reubicaciÃ³n invÃ¡lido (%d)Tipo de reubicaciÃ³n errÃ³neo: 0x%02xSegmento errÃ³neo (debe ser absoluto).Segmento errÃ³neo en la expresiÃ³n.Secuencia de nÃºmeros errÃ³nea: !%s!%sSufijo errÃ³neo despuÃ©s de ':' utilice {b|w|d} Se cambia por defecto a dSufijo errÃ³neo, se cambia por defecto a dValor errÃ³neo (%s) para %sExpresiÃ³n de direcciÃ³n mal formadaLos registros en bancos no estÃ¡n disponibles para esta arquitectura.El nÃºmero grande es demasiado grandeNo se permite un nÃºmero grande en una literal short. Se asume el modo inmediato.NÃºmero grande demasiado grande para el formato %c; se truncaNÃºmero grande demasiado grande para longCampo de bits fuera de rangoLa posiciÃ³n de bit para %s no estÃ¡ en el rango 0..%lu (%lu)Ambos argumentos deben ser sÃmbolos de sustituciÃ³nTanto the_insn.HI como the_insn.LO estÃ¡n activados: %sLa ramificaciÃ³n %s es siempre verdaderaRamificaciÃ³n fuera de rangoRamificaciÃ³n a una direcciÃ³n mal alineada (%lx)RamificaciÃ³n a direcciÃ³n sin alinearEnsamblador descompuesto. No se intentÃ³ ensamblar.CÃ³digo de operaciÃ³n defectuoso: `%s' "%s" Opciones de lÃnea de Ã³rdenes especÃficas de C54x: se utilizÃ³ la instrucciÃ³n CFI sin un .cfi_startproc precedenteno se admite CFI en este objetivose usÃ³ un state restore de CFI sin un remember previoLa versiÃ³n de CPU ya se habÃa establecidoOpciones especÃficas de CRIS: sÃmbolo C_EFCN para %s fuera de Ã¡mbitoSe llama a gen_cond_branch_32 para .arch common_v10_v32 No se puede hacer la reubicaciÃ³n de %d byte %sNo se puede hacer la reubicaciÃ³n pic relativa a pc de %d bytesNo se puede hacer la reubicaciÃ³n relativa a pc de %d bytesNo se puede hacer la reubicaciÃ³n relativa a pc de %d byte para el tipo de almacenamiento %dNo se puede hacer la reubicaciÃ³n pic de %d bytesNo se puede hacer la reubicaciÃ³n de %d bytesNo se puede hacer la reubicaciÃ³n de %d byte para el tipo de almacenamiento %dNo se puede representar la reubicaciÃ³n %s en este formato de fichero objetoNo se puede establecer dlx_skip_hi16_flagNo se puede agregar el bit de parada para marcar el fin del grupo de instruccionesNo se pueden cambiar espacios dentro de una definiciÃ³n de procedimiento. Se descartaNo se pueden cambiar subespacios dentro de una definiciÃ³n de procedimiento. Se descartaNo se puede lidiar con la expresiÃ³n; se cambia por defecto a %ldNo se puede hacer una literal short de un nÃºmero de coma flotante: se usa el modo inmediato.No se puede encontrar el cÃ³digo de operaciÃ³n que coincida con los operandosNo se puede manejar O_big en s390_exp_compareNo se puede dispersar %s: %sNo se puede dispersar `%s': %s No se puede dispersar la instrucciÃ³n '%s':%sNo se puede redirigir la salida de error estÃ¡ndar al fichero '%s'No se puede relajar la diferenciaNo se puede reubicar la expresiÃ³nNo se puede establecer el valor GPNo se pueden establecer las mÃ¡scaras de registroNo se pueden utilizar insn de coma flotante en esta secciÃ³nNo se pueden usar ramificaciones long en esta arquitecturaNo se puede obtener el tamaÃ±o del operando. No se puede asignar un descriptor de desenredo No se puede ensamblar la instrucciÃ³nNo se puede definir el sÃmbolo de exportaciÃ³n: %s No se puede definir el sÃmbolo estÃ¡tico: %s No se puede expresar la reubicaciÃ³n %s%d%sNo se puede encontrar el tipo de reubicaciÃ³n para el sÃmbolo %s, cÃ³digo %dNo se puede generar el tipo de reubicaciÃ³n para el sÃmbolo %s, cÃ³digo %sNo se puede manejar la composturaNo se puede hacer la reubicaciÃ³n relativa a PC %sNo se puede representar la reubicaciÃ³n %s en el fichero objetoNo se puede representar el exponente en %d bitsNo se puede representar el tipo de reubicaciÃ³n %sNo se puede usar el registro especial con esta instrucciÃ³nValor de case %ld inesperado en la lÃnea %d del fichero "%s" No se admite el cambio de la versiÃ³n del CPU al vueloNo se admite la generaciÃ³n de cambio del procesador al vuelo...Escoja el valor GP de %lx Falta una llave que cierraEl cÃ³digo para %s no estÃ¡ en el rango 0..%lu (%lu)Se esperaban una coma y un sÃmbolo para '.asg CADENA, SÃMBOLO'Se esperaban una coma y un sÃmbolo para '.eval EXPR, SÃMBOLO'Se esperaba una comaSe esperaba una coma Se esperaba una coma despuÃ©s del nombre de secciÃ³nAlineaciÃ³n comÃºn negativa; se asume 0La alineaciÃ³n comÃºn no es una potencia de 2No se admiten las expresiones complejasEl operando de objetivo complicado LAPC no es un mÃºltiplo de dos. Use LAPC.DLa condiciÃ³n "%s" no coincide con el grupo precedenteLa condiciÃ³n "%s" utiliza un acumulador diferente al de una condiciÃ³n precedenteLa condiciÃ³n <%c%c> en la directiva de control estructurada no se puede codificar correctamenteEl registro de cÃ³digo de condiciÃ³n deberÃa ser 0 o 4 para %s, era %dEl registro de cÃ³digo de condiciÃ³n deberÃa ser par para %s, era %dExpresiÃ³n constante %d fuera de rango, [%d, %d].ConversiÃ³n de DBcc a un salto absolutoConversiÃ³n de un BSR relativo a PC a un JSR absolutoConversiÃ³n de una ramificaciÃ³n relativa a PC a un salto absolutoConversiÃ³n de una ramificaciÃ³n condicional relativa a PC a un salto absolutoConversiÃ³n de un desplazamiento relativo a PC a absolutoCÃ³digo de coprocesador > %u bits (%lu)Copyright 2011 Free Software Foundation, Inc. No se pueden establecer la arquitectura y la mÃ¡quinaNo se pueden establecer la arquitectura y la mÃ¡quina.Crear secciones con .xdataN/.xrealN/.xstringZ es obsoleto.La secciÃ³n actual no estÃ¡ inicializada, se requiere el nombre de secciÃ³n para .clinkel registro D estÃ¡ fuera de rango para la versiÃ³n VFP seleccionadaOpciones D10V: -O Optimiza. HarÃ¡ algunas operaciones en paralelo. --gstabs-packing Empaqueta juntas las instrucciones short adyacentes aÃºn cuando se especifique --gstabs. Activado por defecto. --no-gstabs-packing Si se especifica --gstabs, no empaqueta juntas las instrucciones adjacentes. El inmediato DSP no estÃ¡ en el rango %ld..%ld (%ld)el inmediato DSP no estÃ¡ en el rango 0..%d (%lu)Uso simultÃ¡neo peligroso de `f%d' y `f%d'No se admite el objetivo por defecto `%s'.Ensamblador defectuoso. No se intentÃ³ ensamblar.Las ramificaciones postergadas no estÃ¡n disponibles en SH1Sintaxis obsoleta.El acumulador de destino para cada parte de esta instrucciÃ³n paralela debe ser diferenteEl registro destino debe ser ARnEl registro destino debe ser R0 o R1El registro destino debe ser R2 o R3No se admite la diferencia de sÃmbolos en secciones diferentesEl valor directo de %ld no es adecuadoLa directiva .atmp sÃ³lo estÃ¡ disponible con la opciÃ³n -mintel-syntaxLa directiva .dual sÃ³lo estÃ¡ disponible con la opciÃ³n -mintel-syntaxLa directiva .enddual sÃ³lo estÃ¡ disponible con la opciÃ³n -mintel-syntaxDirectiva invÃ¡lida dentro de una agrupaciÃ³nÂ¡Se descarta la longitud de desubicaciÃ³n %s!DesubicaciÃ³n demasiado grande para :dEl valor de desplazamiento de %ld es demasiado grandeDivisiÃ³n por cero.No se sabe comÃ³ reconocer la anchura de %c en md_assemble()No se cÃ³mo reubicar operandos planos de tipo %sCondicional %s duplicadoSigno igual (=) duplicado en la instrucciÃ³nSe descarta el registro de predicado duplicadono se admiten las constantes EBCDICLa depuraciÃ³n ECOFF estÃ¡ desactivada.ENDLOOP sin un LOOP correspondienteOpciones de la lÃnea de Ã³rdenes especÃficas de EPIPHANY: ESPEC sin un BSPEC precedenteArgumento vacÃo para .endpArgumento vacÃo de .procLa cuenta de epÃlogo de %lu excede el nÃºmero de prÃ³logos anidados (%u)Los registros de destino paralelo son iguales, un resultado se descartarÃ¡Error %s en %s Error en el argumento %d. Se esperaba: "%s"Error en la expresiÃ³nError en el manejo de la reubicaciÃ³nError en la sintaxis de la declaraciÃ³nError al establecer las opciones para "%s": %sError:Error: Se requiere un nÃºmero par. Se redondea a %dEjecutar %s en IU en serie reversa podrÃa no funcionarEjecutar %s en IU podrÃa no funcionarEjecutar %s en IU podrÃa no funcionar en ejecuciÃ³n paralelaEjecutar %s en serie reversa con %s podrÃa no funcionarCÃ³digo de operaciÃ³n expandido despuÃ©s de la ramificaciÃ³n retardada: `%s'CÃ³digo de operaciÃ³n expandido en modo dual: `%s'Se esperaba '('Se esperaba ')'Se esperaba ':'Se esperaba '['Se esperaba ']'Se esperaba una coma despuÃ©s de la longitud comÃºnSe esperaba una coma despuÃ©s del nombreSe esperaba una coma despuÃ©s del nombre "%s"Se esperaba una coma despuÃ©s del nombre del sÃmboloSe esperaba coma despuÃ©s del nombre del sÃmbolo: se descarta el resto de la lÃnea.Se esperaba una expresiÃ³n inmediataSe esperaba una cadena entre comillasSe esperaba un registro, se obtuvo '%s'.Se esperaba el separador `='Se esperaba un nÃºmero simple.Se esperaba ']', se encontrÃ³ '%s'Se espera un valor constanteSe espera un nombre de registroSe espera un registro.Se espera una constante de carÃ¡cter como argumentoSe esperaba un operando despuÃ©s de ','Se esperaba un operando despuÃ©s de ','; se obtuvo nadaSe esperaba un operando antes de ','; se obtuvo nadaSe espera el registro D para el modo indizado indirecto.Se esperaba un segundo argumentoSe descartan las paradas explÃcitas en modo automÃ¡ticoError de ExpresiÃ³n para el modificador de operando %%hi/%%lo ExpresiÃ³n fuera de rangoExpresiÃ³n fuera de rango, se usa 0ExpresiÃ³n demasiado complejaExpresiÃ³n demasiado compleja.No se admite el direccionamiento extendido en el CPU especificado) extraBasura extra en la llamada a funciÃ³n, se esperaba ')'Basura extra en la lÃneaFATAL: Al adjuntar el encabezado de compilador %sNo se admite FIRST como un argumento de .SUBSPACEramificaciÃ³n FP en la ranura de retrasoramificaciÃ³n FP precedida por una instrucciÃ³n FP; se insertÃ³ NOP.unwind_save de FPA no toma una lista de registrosse esperaba un registro FPAEl parÃ¡metro FRAM debe ser un mÃºltiplo de 8: %d Opciones de lÃnea de Ã³rdenes especÃficas de FVR: FallÃ³ al buscar el inicio real de la funciÃ³n: %s Error fatal: El campo no estÃ¡ alineado adecuadamente [%d] (%d).Campo fuera de rango [%d..%d] (%d).El fichero '%s' no estÃ¡ en el formato de archivo de macroEl primer cÃ³digo de operaciÃ³n es long. No se pueden mezclar las instrucciones como se especificÃ³.El primer operando de .%s debe ser un predicadoEl primer operando de .%s no es un registroEl primer operando de .%s no es un registro vÃ¡lidoEl primer operando de .altrp no es un registro de ramificaciÃ³n vÃ¡lidoEl primer operando de .fframe debe ser una constanteEl primer operando de .prologue debe ser una constante positiva de 4-bitsEl primer operando de .restore debe ser un puntero de pila (sp)El primer operando de .save no debe ser un registroEl primer operando de .save no es un registro vÃ¡lidoEl primer operando de .save.b debe ser una constante positiva de 5-bitsEl primer operando de .save.g debe ser una constante positiva de 4-bitsEl primer operando de .save.gf debe ser una constante de 4-bits que no sea negativaEl primer operando de .unwabi debe ser una constanteEl primer operando de .vfram debe ser un registro generalDependencia de datos fija: %s %s -- %s %s (insertar %d nop!/%d)Dependencia de datos fija: %s %s -- %s %s (insertar 1 pflush/%d)La compostura de %ld es demasiado grande para el campo de anchura %dAC de coma flotante no es legal como operando enteroEl registro de coma flotante deberÃa ser par, era %dEl nÃºmero de coma flotante no es vÃ¡lido en la expresiÃ³nRegistro de coma flotante en la lista de registrosSe fuerza la literal short a modo inmediato. now_seg=%s to_seg=%sSe fuerza la desubicaciÃ³n de byteSe encontrÃ³ '{' despuÃ©s del cambio explÃcito al modo automÃ¡ticoSe encontrÃ³ '{' cuando ya estaba agrupado.Se encontrÃ³ '{' cuando la agrupaciÃ³n manual ya estÃ¡ activadaSe encontrÃ³ '}' cuando la agrupaciÃ³n manual estÃ¡ desactivadaSe encontrÃ³ '}' cuando no se estÃ¡ agrupando.Se encontrÃ³ el uso del nombre de registro %s que no es canÃ³nico; use %s en su lugar.La funciÃ³n espera dos argumentosGNU ensamblador %s GNU ensamblador versiÃ³n %s (%s) utilizando BFD versiÃ³n %s GOT ya estÃ¡ en la tabla de sÃmbolosGOT ya estÃ¡ en la tabla de sÃmbolosexpresiÃ³n GOT errÃ³nea con %s.el tamaÃ±o del prÃ³logo GP excede el tamaÃ±o del campo, se utiliza 0 en su lugarexpresiÃ³n GREG demasiado complicadaBasura al final de la instrucciÃ³n: `%s'.Falla de gas, tipo de reubicaciÃ³n #%i Falla de gas, valor de reubicaciÃ³n %s Falla de gas, valor de reubicaciÃ³n %d El registro general no es legal como operando de coma flotanteLa secciÃ³n de grupo `%s' no tiene firma de grupoLos registros HI/LO se deben especificar juntosLos registros HI/LO se deben especificar sin registros adicionalesLa capacidad de hardware "%s" no se activÃ³ para "%s".La dispersiÃ³n devolviÃ³ "%s".No se necesita o se utiliza el fichero temp. "%s".Â¡No se usa un fichero entre pasos! Se descarta -Vopciones de I960: Opciones de IA-64: --mconstant-gp marca el fichero de salida como que usa el modelo GP-constante (establece la opciÃ³n EF_IA_64_CONS_GP del encabezado ELF) --mauto-pic marca el fichero de salida como que usa el modelo GP-constante sin los descriptores de funciÃ³n (establece la opciÃ³n EF_IA_64_NOFUNCDESC_CONS_GP del encabezado ELF) -milp32|-milp64|-mlp64|-mp64 selecciona el modelo de datos (-mlp64 por defecto) -mle | -mbe selecciona el orden de bytes little- o big-endian (-mle por defecto) -mtune=[itanium1|itanium2] optimiza para un CPU especÃfico (por defecto -mtune=itanium2) -munwind-check=[warning|error] revisiÃ³n de directiva de desenredo (-munwind-check=warning por defecto) -mhint.b=[ok|warning|error] revisiÃ³n de hint.b (-mhint.b=error por defecto) -x | -xexplicit activa la revisiÃ³n de violaciones de dependencias (por defecto) Opciones de la lÃnea de Ã³rdenes especÃficas de IP2K: caÃda IT en el rango de un bloque IT previoUna instrucciÃ³n IU no puede estar en el contenedor izquierdoSe descarta el intento de redefinir el sÃmboloSe ignora el intento de redefinir el sÃmbolo %sSe descarta el intento de redefinir el sÃmbolo `%s'.Se descarta el intento de derramar mÃ¡s allÃ¡ del fin de la regiÃ³nSe descartan los atributos de secciÃ³n cambiados para %sSe descarta la declaraciÃ³n debido a "%s"NÃºmero %s ilegal (%lu, 0x%lx)CÃ³digo de 19-bit ilegal (%lu)Registro de procesador de 32 bit ilegal (`%s') en la Instruction: `%s'Registro AR ilegal en la referencia indirectaRegistro de Co-procesador ilegal en Instruction `%s'Registro especial de Co-procesador ilegal en Instruction `%s'Scale ilegal - `%d'ParÃ¡metro `cinv' ilegal: `%c'Operando `mask16' ilegal, la operaciÃ³n estÃ¡ indefinida - `%s'CombinaciÃ³n ilegal de funciones de reubicaciÃ³nPar de registro de Ãndice ilegal (`%s') en la InstrucciÃ³n: `%s'InstrucciÃ³n ilegal o cÃ³digo de operaciÃ³n sin implementar.Operando ilegal (arg %d)Separador de operando `%c' ilegalOperando ilegal.Operandos ilegalesOperandos ilegales (espacios en blanco): `%s'Operandos ilegales para %sOperandos ilegales%sOperandos ilegales: %%%s sÃ³lo se pueden usar con la llamada __tls_get_addrOperandos ilegales: %%%s no se pueden usar junto con otras reubicaciones en la insn ()Operandos ilegales: %%%s requiere de argumentos en ()Operandos ilegales: %%r_%s%d requiere argumentos en ()Operandos ilegales: %%r_plt en el campo de datos de %d-bytesOperandos ilegales: %%r_tls_dtpoff en el campo de datos de %d-bytesOperandos ilegales: No se puede agregar una expresiÃ³n que no es constante a %%%s()Operandos ilegales: No se puede hacer aritmÃ©tica que involucre a %%%s() de un sÃmbolo reubicableOperandos ilegales: No se puede hacer aritmÃ©tica aparte de + y - que involucre %%%s()Operandos ilegales: SÃ³lo se permite %%r_%s%d en campos de datos de %d-bytesOperandos ilegales: hay basura despuÃ©s de %%r_%s%d()Registro de procesador ilegal (`%s') en la InstrucciÃ³n: `%s'Registro ilegal (`%s') en Instruction: `%s'Registro `%s' ilegal en la Instruction `%s'Registro ilegal `%s' en la lista de registros de coprocesadorRegistro ilegal `%s' en la lista especial de registros de coprocesadorRegistro ilegal `%s' en la lista de registrosRegistro ilegal `%s' en la lista de registros de usuarioPar de registro ilegal (`%s') en la InstrucciÃ³n: `%s'Par de registro ilegal `%s' en la InstrucciÃ³n `%s'Nombre de secciÃ³n `%s' ilegal (causa una colisiÃ³n con el nombre de secciÃ³n de desenredo)Tipo de operando ilegal (arg %d)Imm4 no es el primer operandoNo se permite un operando inmediato para el operando %d.El valor inmediato de %ld es demasiado grandeEl valor inmediato no estÃ¡ en el rango de 16 bit: %ldEl valor inmediato no estÃ¡ en el rango de 16 bit con signo: %ldEl valor inmediato no estÃ¡ en el rango de 16 bit sin signo: %ldEl valor inmediato no estÃ¡ en el rango de 4 bit sin signo: %ldEl valor inmediato no estÃ¡ en el rango de 5 bit sin signo: %ldEl valor inmediato no estÃ¡ en el rango de 6 bit: %ldEl valor inmediato no estÃ¡ en el rango de 6 bit sin signo: %ldEl valor inmediato no estÃ¡ en el rango de 8 bit: %ldEl valor inmediato no estÃ¡ en el rango de 8 bit con signo: %ldEl valor inmediato no estÃ¡ en el rango de 8 bit sin signo: %ldEl valor inmediato de %ld es demasiado grandeEl valor inmediato de %ld es demasiado grande para ldfLos inmediatos %d y %d darÃ¡n una conducta sin definir.Cantidad de desplazamiento impropia (%ld), se usan bits bajosÃndice de bit impropio (%lu)TamaÃ±o de extract impropio (%lu, posiciÃ³n %lu)Inmediato impropio (%ld)TamaÃ±o de insert impropio (%lu, posiciÃ³n %lu)PosiciÃ³n impropia (%lu)Cuenta de rotaciÃ³n impropiaCantidad de desplazamiento impropia (%lu)TamaÃ±o impropio (%lu)Primer y segundo operandos incompatibles en la instrucciÃ³nValor de fr_opcode incorrecto en frag. Error interno.....NÃºmero incorrecto de operandosNÃºmero incorrecto de operandos dadosEl valor de incremento/decremento estÃ¡ fuera de rango: `%ld'.El Ãndice sÃ³lo se puede aplicar a registros rotantes o indirectosEl Ãndice debe ser un registro generalÃndice fuera de rango 0..%uSe requiere un registro Ãndice IR0,IR1 para el desplazamientoNo se permite el modo indizado directo para movb/movw.El direccionamiento indizado indirecto no es vÃ¡lido para 68HC11.El Ãndice de registros indirectos debe ser un registro generalSe encontrÃ³ un ciclo infinito al intentar computar las direcciones de los sÃmbolos en la secciÃ³n %sNo se admiten infinitos en este objetivo El .body inicial debe preceder a cualquier instrucciÃ³nEl .prologue inicial debe preceder a cualquier instrucciÃ³nFallÃ³ la inserciÃ³n de "%s" en la tabla de dispersiÃ³n de constantes: %sFallÃ³ la inserciÃ³n de "%s" en la tabla de entrada de pistas: %sFallÃ³ la inserciÃ³n de "%s" en la tabla de estructuras: %sNo se permite la instrucciÃ³n %s en una ranura de retardo.La instrucciÃ³n %s requiere una expresiÃ³n absolutaInstrucciÃ³n %s: el resultado es siempre falsoInstrucciÃ³n %s: el resultado es siempre verdaderoLa instrucciÃ³n '%s' requiere una versiÃ³n de cpu LPLa instrucciÃ³n '%s' requiere el modo de direccionamiento farNo se reconoce la instrucciÃ³n `%s'.La instrucciÃ³n no cabe en las ranuras de retardo disponibles (%d insns word, %d ranuras restantes)La instrucciÃ³n no cabe en las ranuras de retardo disponibles (%d insns word, %d ranuras restantes). El comportamiento resultante no estÃ¡ definido.La instrucciÃ³n no admite las direcciones =NFormatos de instrucciÃ³n para `%s':La instrucciÃ³n en el contenedor R es aplastada por la instrucciÃ³n de control de flujo en el contenedor L.La instrucciÃ³n se debe ejecutar en paraleloLa instrucciÃ³n se debe ejecutar en paralelo con otra instrucciÃ³n.La instrucciÃ³n no se admite en esta arquitecturaLa instrucciÃ³n usa una versiÃ³n long, asÃ que no se puede mezclar como se especificÃ³Las instrucciones no usan tuberÃas de ejecuciÃ³n paralela.Las instrucciones no se pueden ejecutar en paraleloLas instrucciones comparten la misma tuberÃa de ejecuciÃ³nLas instrucciones que usan modificadores de desplazamiento long o direcciones absolutas no se pueden repetir. El comportamiento resultante no estÃ¡ definido.Las instrucciones que causan discontinuidad en el PC no se permiten en una ranura de retardo. El comportamiento resultante no estÃ¡ definido.Intel K1OM es solamente 64bit ELFIntel K1OM sÃ³lo es 64bitIntel L1OM es solamente 64bit ELFIntel L1OM sÃ³lo es 64bitError Interno: No se puede alojar m68k_sorted_opcodes de tamaÃ±o %dError Interno: No se puede dispersar %s: %sError Interno: No se puede encontrar %s en la tabla de dispersiÃ³nError Interno: No se puede dispersar %s: %sError interno: longitud errÃ³nea de instrucciÃ³nError interno del ensamblador para la instrucciÃ³n %sError interno del ensamblador para el formato de instrucciÃ³n %sError interno del ensamblador para la macro %sBicho interno. Intente utilizar 0(r%d) en lugar de @r%dError de consistencia interno. revise ns32k-opcode.hSe encontrÃ³ un error interno en md_convert_frag: desplazamiento %ld. Por favor repÃ³rtelo.Â¡Error interno! Error interno, se aborta en %s lÃnea %d Error interno, se aborta en %s lÃnea %d en %s Error interno: No se puede encontrar el espacio contenedor para %s.Error interno: cÃ³digo de operaciÃ³n %s errÃ³neo (tipo de operando de extensiÃ³n `+%c' desconocido): %s %sError interno: cÃ³digo de operaciÃ³n microMIPS errÃ³neo (bits 0x%lx definidos): %s %sError interno: cÃ³digo de operaciÃ³n microMIPS errÃ³neo (bits 0x%lx sin definir): %s %sError interno: cÃ³digo de operaciÃ³n microMIPS errÃ³neo (longitud errÃ³nea: %u): %s %sError interno: cÃ³digo de operaciÃ³n microMIPS errÃ³neo: %s %sError interno: cÃ³digo de operaciÃ³n microMIPS errÃ³neo (no coincide cÃ³digo de operaciÃ³n/longitud): %s %sError interno: cÃ³digo de operaciÃ³n microMIPS errÃ³neo (tipo de operando de extensiÃ³n `m%c' desconocido): %s %sError interno: cÃ³digo de operaciÃ³n microMIPS errÃ³neo (tipo de operando `%c' desconocido): %s %sError interno: cÃ³digo de operaciÃ³n mips errÃ³neo (tipo de operando de extensiÃ³n desconocido `%c%c'): %s %sError interno: no se puede encontrar el cÃ³digo de operaciÃ³n `%s' para `%s' Error interno: no se puede dispersar `%s': %s Error interno: no se sabe como forzar a %s al fin del grupo de instruccionesError interno: se pierde el cÃ³digo de operaciÃ³n: `%s' "%s" Error interno de lÃ³gica en iif.iifP[].tipoError interno de lÃ³gica en iif.iifP[n].tipoError lÃ³gico interno. lÃnea %d, fichero "%s"Error lÃ³gico interno. lÃnea %d, fichero "%s"OpciÃ³n --size-check= invÃ¡lida: `%s'Argumento de .CALL invÃ¡lido: %sArgumento de .CALLINFO invÃ¡lido: %sArgumento de .SPACE invÃ¡lidoArgumento de .SUBSPACE invÃ¡lidoFormato .insn invÃ¡lido CondiciÃ³n de AdiciÃ³n InvÃ¡lida: %sCondiciÃ³n de AdiciÃ³n y RamificaciÃ³n InvÃ¡lidaCondiciÃ³n de RamificaciÃ³n en Bit InvÃ¡lida: %cIdentificador COPR invÃ¡lidoValor de operando CST4 invÃ¡lido (arg %d)CondiciÃ³n de ComparaciÃ³n y RamificaciÃ³n InvÃ¡lidaCondiciÃ³n de ComparaciÃ³n/SustracciÃ³n InvÃ¡lidaCondiciÃ³n de ComparaciÃ³n/SustracciÃ³n InvÃ¡lida: %sValor de operando DISPU4 invÃ¡lido (arg %d)ExpresiÃ³n DataLabel invÃ¡lidaCondiciÃ³n de ComparaciÃ³n de FP InvÃ¡lida: %sFormato de Operando FP InvÃ¡lido: %3sCompletador FTEST invÃ¡lido: %sFormato de Operando de Coma Flotante InvÃ¡lido.Sintaxis de Completador de Carga Indizado InvÃ¡lido.Completador de Carga Indizado InvÃ¡lido.CondiciÃ³n de InstrucciÃ³n LÃ³gica InvÃ¡lida.Inmediato MDMX invÃ¡lido (%ld)NulificaciÃ³n InvÃ¡lida: (%c)ExpresiÃ³n PIC invÃ¡lida.Registro invÃ¡lido en la Lista de RegistrosIdentificador SFU invÃ¡lidoCondiciÃ³n Desplazar/Extraer/Depositar InvÃ¡lida.Completador Short de Load/Store InvÃ¡lido.Completador Short Bytes de Store InvÃ¡lido.CondiciÃ³n de InstrucciÃ³n Unit InvÃ¡lida.Registro acumulador invÃ¡lido.Argumento invÃ¡lido %d para .prologue.DescripciÃ³n de argumento invÃ¡lida: %dUbicaciÃ³n de argumento invÃ¡lida: %s Argumento invÃ¡lido para la opciÃ³n --abi: %sArgumento invÃ¡lido para la opciÃ³n --isa: %sArgumento invÃ¡lido para .abi: %sArgumento invÃ¡lido para .mode: %sRegistro auxiliar invÃ¡lido (utilice AR0-AR7)CarÃ¡cter invÃ¡lido %s antes del operando %sCarÃ¡cter invÃ¡lido %s en el operando %sCarÃ¡cter invÃ¡lido %s en el cÃ³digo de operaciÃ³nCombinaciÃ³n invÃ¡lida de instrucciones para el agrupado.CombinaciÃ³n invÃ¡lida: --abi=32 con --abi=64CombinaciÃ³n invÃ¡lida: --abi=64 con --abi=32CombinaciÃ³n invÃ¡lida: --abi=64 con --isa=SHcompactCombinaciÃ³n invÃ¡lida: --isa=SHcompact con --abi=64CombinaciÃ³n invÃ¡lida: --isa=SHcompact con --isa=SHmediaCombinaciÃ³n invÃ¡lida: --isa=SHmedia con --isa=SHcompactNÃºmero de registro 0 de coprocesador invÃ¡lidoValor de subselecciÃ³n de coprocesador (0-7) invÃ¡lidoArquitectura por defecto invÃ¡lida, ensamblador descompuesto.Registro destino invÃ¡lido para esta instrucciÃ³n, utilice 'tfr'.Registro destino invÃ¡lido.Desplazamiento invÃ¡lido en la referencia indirectaSintaxis de dmad '%s' invÃ¡lidaRegistro acc dsp invÃ¡lidoRegistro acc dsp/smartmips invÃ¡lidoUso duplicado invÃ¡lido de `%c%d'ExpresiÃ³n invÃ¡lida despuÃ©s de # number ExpresiÃ³n invÃ¡lida despuÃ©s de %%%% ExpresiÃ³n invÃ¡lida.Selector de campo invÃ¡lido. Se asume F%%.TamaÃ±o de campo invÃ¡lido, debe ser de 1 a 32NÃºmero de coma flotante invÃ¡lidoOperando de escritura inmediato invÃ¡lido.Modo indizado indirecto invÃ¡lido.Registro indizado invÃ¡lido, se esperaba el registro X.Registro indizado invÃ¡lido, se esperaba el registro Y.Registro indizado invÃ¡lido.Modo de direccionamiento indirecto invÃ¡lidoDesplazamiento de modo de direccionamiento indirecto %d invÃ¡lidoInstrucciÃ³n %s invÃ¡lidaEtiqueta '%s' invÃ¡lidaCompletador de combinaciÃ³n derecha/izquierda invÃ¡lidoLongitud invÃ¡lida (utilice de 0 a %d)MnemÃ³nico invÃ¡lido '%s'Modo invÃ¡lido: %s NÃºmero invÃ¡lidoCÃ³digo de operaciÃ³n/operandos invÃ¡lidosOperando(s) invÃ¡lido(s) para la instrucciÃ³n paralela "%s"Operando invÃ¡lido (utilice 1, 2, Ã³ 3)ExpresiÃ³n de operando invÃ¡lidoOperando invÃ¡lido para `%s'Operando invÃ¡lido: se utilizÃ³ un valor inmediato como direcciÃ³n.Operando invÃ¡lido: se utilizÃ³ un valor inmediato como direcciÃ³n base.Operandos invÃ¡lidosOperandos invÃ¡lidos %sOperandos invÃ¡lidos para %sOperador invÃ¡lido para el operando.Modo de direccionamiento invÃ¡lido o ilegal combinado con Ãndice-escaladoReubicaciÃ³n relativa a pc invÃ¡lidaRegistro de rendimiento invÃ¡lido (%lu)Completador de permutaciÃ³n invÃ¡lidoTipo de registro invÃ¡lido para el formato P3.Tipo de registro invÃ¡lido para el formato B1Tipo de registro invÃ¡lido para el formato P6Tipo de registro invÃ¡lido para el formato X1Tipo de registro invÃ¡lido para el formato X3Registro invÃ¡lido para la instrucciÃ³n dbcc/tbcc.Registro invÃ¡lido para post/pre incremento.Registro invÃ¡lido para fmpyadd Ã³ fmpysub de precisiÃ³n simpleLista de registros invÃ¡lida para ldm/stm NÃºmero de registro invÃ¡lido (%d)NÃºmero de registro invÃ¡lido en '%.6s'EspecificaciÃ³n de registro invÃ¡lida.Registro invÃ¡lido.Registro invÃ¡lido: 'r%d'Registro invÃ¡lido: r0 y r15 ilegalesReubicaciÃ³n invÃ¡lidaModo escalado-indizado invÃ¡lido, utilice (b,w,d,q)Uso simultÃ¡neo invÃ¡lido de `f%d' y `f%d'Registro fuente invÃ¡lido para esta instrucciÃ³n, utilice 'tfr'.Registro fuente invÃ¡lido.Registro de estado "%s" invÃ¡lidoSubÃndice invÃ¡lido (utilice de 1 a %d)Sufijo invÃ¡lido para la entrada de conjunto de literalesSintaxis invÃ¡lida en el modo de direccionamiento ExternoSintaxis invÃ¡lida en el modo de direccionamiento Relativo a MemoriaSintaxis invÃ¡lida en el modo de direccionamiento relativo al PCUso invÃ¡lido de `%c%d' como operando de salidaUso invÃ¡lido de `r%d' como operando de direcciÃ³n de actualizaciÃ³n baseUso invÃ¡lido del operador de paralelizador.Valor invÃ¡lido para `%s' (%lu)Nombres MCU conocidos:Nombres MCU conocidos: La instrucciÃ³n LDP requiere un operando de 24-bitno se admite el paso hacia atrÃ¡s de una expresiÃ³n LOCtanto LR como PC no deben estar en la lista de registrosSe redefiniÃ³ la etiqueta "$%d"La etiqueta debe estar al inicio de un grupoSe requiere una etiqueta para .tagNo se permite el signo mÃ¡s inicial en el modo coreLa longitud de .comm "%s" ya es %ld. No se cambia a %d.La longitud de .comm "%s" ya es %ld. No se cambia a %ld.La longitud de .lcomm "%s" ya es %ld. No se cambiÃ³ a %ld.La longitud de .scomm "%s" ya es %ld. No se cambiÃ³ a %ld.Se descarta la especificaciÃ³n de longitud. Se usa el modo de direccionamiento 9FLÃnea %d: tipo de reubicaciÃ³n desconocido: 0x%x.Los nÃºmeros de lÃnea deben ser enteros positivos Desbordamiento de Conjunto LiteralEl sÃmbolo local `%s' no se puede igualar al sÃmbolo comÃºn `%s'Las instrucciones long no se pueden combinar.Se ve como un proc, no se puede saber de quÃ© tipo. Se truncaron los bits de orden inferior en el operando de coma flotante inmediatoEl cÃ³digo mÃ¡s bajo para %s no estÃ¡ en el rango 0..%lu (%lu)se utilizÃ³ un cÃ³digo de operaciÃ³n especÃfico de M340 cuando se ensamblaba para M210Opciones especÃficas de MCORE: -{no-}jsri2bsr {des}activa la transformaciÃ³n de jsri a bsr (def: des) -{no-}sifilter {des}activa el comportamiento de filtro del silicÃ³n (def: des) -cpu=[210|340] selecciona el tipo de CPU -EB ensambla para un sistema big endian (por defecto) -EL ensambla para un sistema little endian Llamada PIC MIPS a un registro diferente de $25Opciones MIPS: -EB genera salida big endian -EL genera salida little endian -g, -g2 no borra NOPs innecesarios o intercambia ramificaciones -G NUM permite la referencia a objetos hasta NUM bytes implÃcitamente con el registro gp [por defecto 8] Opciones MN10200: ninguna aÃºn Opciones de ensamblador para MN10300: ninguna aÃºn el operando MOVI no es un valor de 32-bit con signo: 0x%8x%08xno se admite el pseudo-operador ORG de estilo MRIMSP430 no tiene %d registrosOpciones de MSP430: -mmcu=[nombre-msp430] selecciona el tipo de microcontrolador msp430x110 msp430x112 msp430x1101 msp430x1111 msp430x1121 msp430x1122 msp430x1132 msp430x122 msp430x123 msp430x1222 msp430x1232 msp430x133 msp430x135 msp430x1331 msp430x1351 msp430x147 msp430x148 msp430x149 msp430x155 msp430x156 msp430x157 msp430x167 msp430x168 msp430x169 msp430x1610 msp430x1611 msp430x1612 msp430x311 msp430x312 msp430x313 msp430x314 msp430x315 msp430x323 msp430x325 msp430x336 msp430x337 msp430x412 msp430x413 msp430x415 msp430x417 msp430xE423 msp430xE425 msp430E427 msp430xW423 msp430xW425 msp430W427 msp430xG437 msp430xG438 msp430G439 msp430x435 msp430x436 msp430x437 msp430x447 msp430x448 msp430x449 el bit alto de load MT no es 0 o 1 (%lu)Opciones de la lÃnea de Ã³rdenes especÃficas de MT: El bit de modo de usuario MT no es 0 o 1 (%lu)Una instrucciÃ³n MU no puede estar en el contenedor derechoLa macro %s aÃºn no estÃ¡ implementadaLa macro `%s' ya estÃ¡ definidaInstrucciÃ³n macro expandida en una instrucciÃ³n de tamaÃ±o errÃ³neo en una ranura de retraso de ramificaciÃ³n de 16-bitInstrucciÃ³n macro expandida en una instrucciÃ³n de tamaÃ±o errÃ³neo en una ranura de retraso de ramificaciÃ³n de 32-bitInstrucciÃ³n macro expandida en instrucciones mÃºltiplesInstrucciÃ³n macro expandida en instrucciones mÃºltiples en una ranura de retraso de ramificaciÃ³nLa macro utilizÃ³ $at despuÃ©s de ".set noat"se esperaba un registro Maverick DSPSCse esperaba un registro Maverick MVAXse esperaba un registro Maverick MVDse esperaba un registro Maverick MVDXse esperaba un registro Maverick MVFse esperaba un registro Maverick MVFXSe pueden establecer %d bits como mÃ¡ximo en el operando `mask16'Opciones de lÃnea de Ã³rdenes especÃficas para MeP: -EB ensambla para un sistema big endian -EL ensambla para un sistema little endian (por defecto) -mconfig= especifica una configuraciÃ³n de chip a usar -maverage -mno-average -mmult -mno-mult -mdiv -mno-div -mbitops -mno-bitops -mleadz -mno-leadz -mabsdiff -mno-absdiff -mminmax -mno-minmax -mclip -mno-clip -msatur -mno-satur -mcop32 activa/desactiva los cÃ³digos de operaciÃ³n dados Si se da -mconfig, las otras opciones -m lo modifican. De otra manera, si no se dan opciones -m, todos los cÃ³digos de operaciÃ³n core se activan; si se da cualquier opciÃ³n -m que activa, sÃ³lo Ã©sas se activan; si se da cualquier opciÃ³n -m que desactiva, sÃ³lo Ã©sas se desactivan. El registro mapeado en memoria "%s" estÃ¡ fuera de rango.entry mal colocado. Se descarta.Falta un '(' despuÃ©s de la funciÃ³n de sÃmbolo de sustituciÃ³nFalta un ')'Falta un ')' en la expresiÃ³n de sÃmbolo de sustituciÃ³n suscritoFalta una ','falta un '}' al final del ficheroFalta )Falta un ) en ra(rb)Falta un .EXIT para un .ENTRYFalta un .callinfoFalta un .callinfo para este procedimientoFalta un .callinfo.Falta un .endp despuÃ©s del .proc previoFalta un .exit Falta .label_state %ldFalta un .procend Falta una CondiciÃ³n de RamificaciÃ³n de BitFalta un `]' para cerrar el modo indizado directo.Falta un `]' para cerrar el operando indirecto de registro.Faltan argumentos para el cÃ³digo de operaciÃ³n <%s>Falta el terminador de sustituciÃ³n forzada ':'Falta el nombre de funciÃ³n para .PROCFalta el nombre de funciÃ³n para .PROC (cadena de etiquetas corrupta)Falta el nombre de etiqueta en .LABELFalta el nombre de macroFaltan las llaves coincidentes : `%s'Falta un operandoFalta un operando.Falta una directiva .using o es errÃ³neaFalta el calificador de parÃ¡metro para `%s' en la macro `%s'Falta el tipo de relaciÃ³n del predicadoFalta el segundo registro para el modo indizado indirecto.Faltan el segundo registro o el desplazamiento para el modo indizado indirecto.Falta el nombre de secciÃ³nFalta el tamaÃ±o del argumentoFalta un nombre de sÃmbolo en la directivaFalta el valor para el parÃ¡metro requerido `%s' de la macro `%s'No se admite la mezcla de direccionamiento normal y extendidoSe mezcla la sintaxis del registro, con y sin '$'.Se encontrÃ³ mÃ¡s un registro AR en la referencia indirectaSe encontrÃ³ mÃ¡s de un desplazamiento en la referencia indirectaMÃ¡s de un operador de reubicaciÃ³n por insnOpciones para Motorola 68HC11/68HC12/68HCS12: -m68hc11 | -m68hc12 | -m68hcs12 especifica el procesador [por defecto %s] -mshort usa la ABI int de 16-bit (por defecto) -mlong usa la ABI int de 32-bit -mshort-double usa la ABI double de 32-bit -mlong-double usa la ABI double de 64-bit (por defecto) --force-long-branchs siempre convierte las ramificaciones relativas en absolutas -S,--short-branchs no convierte las ramificaciones relativas en absolutas cuando el desplazamiento estÃ¡ fuera de rango --strict-direct-mode no convierte el modo directo en modo extendido cuando la instrucciÃ³n no admite modo directo --print-insn-syntax muestra la sintaxis de la instrucciÃ³n en caso de error --print-opcodes muestra la lista de instrucciones con sintaxis --generate-example genera un ejemplo de cada instrucciÃ³n (se utiliza para pruebas) Debe estar en un espacio antes de cambiar o declarar subespacios. Opciones de NS32K: -m32032 | -m32532 selecciona la variante de la arquitectura NS32K --disp-size-default=<1|2|4> No se admiten NaNs en este objetivo Nombre # Modos Min ops Max ops Masc. modos # Usado Nan, se usa cero.Se necesita #1 Ã³ #2 aquÃNo se escogieron los cÃ³digos de operaciÃ³n Power ni PowerPC.Se esperaba un registro de precisiÃ³n doble o cuÃ¡druple NeonSe esperaba un registro de precisiÃ³n cuÃ¡druple NeonProcedimientos anidadosNo se encontrÃ³ una !literal!%ldNo se encontrÃ³ un !tlsgd!%ldNo se encontrÃ³ un !tlsldm!%ldNo hay un punto de entrada 'bal' para el proceso hoja %sNo hay .ENTRY para este .EXITNo se utilizÃ³ el pseudo-operador .cprestore en el cÃ³digo PICNo se utilizÃ³ el pseudo-operador .frame en el cÃ³digo PICNo se permite addend en la reubicaciÃ³n @fptr()No hay una coma despuÃ©s de .pdesc No se compilÃ³ el soporte para el formato de fichero objeto de %d bitNo se compilÃ³ el soporte para el formato de fichero objeto de 64 bitNo hay un marco actualNo se encontrÃ³ una instrucciÃ³nNo hay instrucciÃ³n o falta el cÃ³digo de operaciÃ³n.No hay una secciÃ³n XCOFF dwarf conocida para la opciÃ³n 0x%08x No se encontrÃ³ un lda !gpdisp!%ldNo se encontrÃ³ un ldah !gpdisp!%ldNo hay memoria para el nombre del sÃmbolo.No hay operadorNo hay secciÃ³n previa a la cual regresar. Se descarta la directiva.No hay un operando de reubicaciÃ³nNo hay informaciÃ³n de segmento para la secciÃ³n actualNo existe esa entrada en la lista. (registros cpu/mmu)No existe ese cÃ³digo de operaciÃ³nNo hay un sÃmbolo despuÃ©s de .code_addressNo hay un sÃmbolo despuÃ©s de .linkageSe usÃ³ un salto que no es PIC en una biblioteca PICSÃmbolo no absoluto: '%s'.No se permiten sÃmbolos que no sean constantes No es una arquitectura coldfire definidaNo es una expresiÃ³n simbÃ³licaNo hay suficientes operandosNo estÃ¡ en un espacio. No estÃ¡ en un subespacio. El nÃºmero (0x%s) es mÃ¡s grande que 32 bitsEl nÃºmero es mÃ¡s grande que 64 bitsEl nÃºmero de elementos debe ser positivosNÃºmero demasiado grandeoperando inmediato OPF fuera de rango (0-0x1ff)Se usan registros numerados impares como objetivo para una instrucciÃ³n multi-registroEl desplazamiento no estÃ¡ alineado a 16 bytes (%ld)El desplazamiento no estÃ¡ en el rango %ld..%ld (%ld)Se descarta el desplazamiento en estructuras anidadasDesplazamiento fuera del rango de 16-bit: %ld.Desplazamiento fuera del rango de 5-bit para insn movw/movb: %ldDesplazamiento fuera del rango de 5-bit para insn movw/movb: %ld.Desplazamiento demasiado grandeUna de estas instrucciones no se puede ejecutar en paralelo.SÃ³lo se admiten los desplazamientos constantesSÃ³lo se admite el alojamiento de espacio constanteÂ¡SÃ³lo un pseudo-operador .compiler por fichero!Â¡SÃ³lo un pseudo-operador .copyright por fichero!Â¡SÃ³lo un pseudo-operador .version por fichero!SÃ³lo se permite una comparaciÃ³n condicionalSÃ³lo se permite un desbordamiento condicionalSolamente se reporta la primera ruta donde se encuentra el conflictoEl cÃ³digo de operaciÃ³n %s no estÃ¡ disponible en este modoNo se reconoce el cÃ³digo de operaciÃ³n `%s'.El cÃ³digo de operaciÃ³n `%s' con esos tipos de operando no estÃ¡ disponible en el modo %sEl cÃ³digo de operaciÃ³n `%s' con esos tipos de operando no estÃ¡n disponibles en el modo H8/300El cÃ³digo de operaciÃ³n `%s' con esos tipos de operando no estÃ¡ disponible en el modo H8/300HEl cÃ³digo de operaciÃ³n `%s' con esos tipos de operando no estÃ¡ disponible en el modo H8/300SNo se admite el cÃ³digo de operaciÃ³n en este procesador: %sCÃ³digo de operaciÃ³n(%d.%s): El operando "%s" estÃ¡ fuera de rango (utilice 1 Ã³ 2)El operando %d de .%s debe ser una constanteEl operando %d de .%s debe ser un registro preservadoEl operandos %d de .%s debe ser un registro modificableEl operando %u de '%s' debe ser '%s'El operando '%s' estÃ¡ fuera de rango (%d <= x <= %d)No se reconoce el operando `%x' en fixup16.No se reconoce el operando `%x' en fixup8.El operando tiene un desplazamiento impar (arg %d)No coinciden los operandosEl operando de .vframe contradice a .prologueOperando fuera del rango de 16-bit: `%ld'.Operando fuera del rango de 8-bit: `%ld'.Operando fuera de rango (arg %d)Operando fuera de rango para una ramificaciÃ³n relativa: `%ld'Desbordamiento de operandoEl operando de .copy_state debe ser una constanteEl operando de .label_state debe ser una constanteEl operando de .save.f debe ser una constante positiva de 20-bitsEl operando de .spill debe ser una constanteEl operando de .vframesp debe ser una constante (desplazamiento relativo al sp)El valor del operando no estÃ¡ en los 64 KB superiores (arg %d)Ambos operandos de .save.gf no pueden ser cero al mismo tiempoEl operador sÃ³lo se puede aplicar a sÃmbolos.La opciÃ³n -b es obsoleta, por favor utilice -mbigLa opciÃ³n -p es obsoleta, por favor utilice -mmemparmLa opciÃ³n -r es obsoleta, por favor utilice -mregparmLa opciÃ³n -s es obsoleta, por favor utilice -msmallNo se reconoce la opciÃ³n `%s'.Opciones: -a[sub-opciÃ³n...] activa listados Sub-opciones [por defecto hls]: c omite condicionales falsos d omite directivas de depuraciÃ³n g incluye informaciÃ³n general h incluye cÃ³digo de alto nivel l incluye ensamblador m incluye expansiones de macros n omite el procesamiento de formas s incluye sÃmbolos =FICH lista a FICHero (debe ser la Ãºltima subopciÃ³n) Memoria agotada: no se puede asignar una nueva entrada de cadena de espacio: %s Memoria agotada: no se puede asignar una nueva entrada de cadena de subespacio: %s El manejo del desplazamiento .word fuera de rango no estÃ¡ implementado para .arch common_v10_v32Desbordamiento en la expresiÃ³n, se trunca a 16 bitsDesbordamiento en la expresiÃ³n, se trunca a 8 bitsno se permite PC en la lista de registrosla parte PC del operando es impredeciblela instrucciÃ³n MIPS16 relativa a PC referencÃa a una secciÃ³n diferenteRamificaciÃ³n relativa a PC a la etiqueta %s, la cual no estÃ¡ en el espacio de instrucciÃ³nel desplazamiento relativo al PC no estÃ¡ alineado a 4 bytesel desplazamiento relativo al PC estÃ¡ fuera de rangoLa reubicaciÃ³n relativa al PC se debe resolver trivialmenteDesbordamiento del desplazamiento del cÃ³digo PIC (mÃ¡x 16 bits con signo)Desbordamiento del desplazamiento del cÃ³digo PIC (mÃ¡x 32 bits con signo)el tamaÃ±o de la reubicaciÃ³n PIC no coincide con el tamaÃ±o del operandoOpciones de PJ: -little genera cÃ³digo little endian -big genera cÃ³digo big endian El operando PTA es un sÃmbolo SHcompactEl operando PTB es un sÃmbolo SHmediaEl cÃ³digo de operaciÃ³n paralelo no puede contener mÃ¡s de dos instruccionesEl parÃ¡metro nombrado '%s' no existe para la macro `%s'No se pueden modificar los parÃ¡metros de un subespacio existenteFallÃ³ la decodificaciÃ³n.Â¿Tal vez le falta %%tpoff()?InstrucciÃ³n en `pipeline': fsrc1 = fdestPor favor reporte este bicho. Por favor utilice --help para ver el modo de empleo y opciones para este ensamblador. Valor por defecto sin sentido para el parÃ¡metro requerido `%s' en la macro `%s'Uso sin sentido de p0 como el primer operando de .%sUso sin sentido del primer operando en cero de .prologueEl modo de post-decremento no es vÃ¡lido para 68HC11.El modo de post-incremento no es vÃ¡lido para 68HC11.Opciones de PowerPC: -a32 genera ELF32/XCOFF32 -a64 genera ELF64/XCOFF64 -u se descarta -mpwrx, -mpwr2 genera cÃ³digo para POWER/2 (RIOS2) -mpwr genera cÃ³digo para POWER (RIOS1) -m601 genera cÃ³digo para PowerPC 601 -mppc, -mppc32, -m603, -m604 genera cÃ³digo para PowerPC 603/604 -m403 genera cÃ³digo para PowerPC 403 -m405 genera cÃ³digo para PowerPC 405 -m440 genera cÃ³digo para PowerPC 440 -m464 genera cÃ³digo para PowerPC 464 -m476 genera cÃ³digo para PowerPC 476 -m7400, -m7410, -m7450, -m7455 genera cÃ³digo para PowerPC 7400/7410/7450/7455 -m750cl genera cÃ³digo para PowerPC 750cl El modo de pre-incremento no es vÃ¡lido para 68HC11Se esperaba un registro de predicadoSe requieren el predicado fuente y destinoPrefijo 'd.' invÃ¡lido para la instrucciÃ³n `%s'Fin de sufijo prematuro -- Se cambia por defecto a d.save previo estÃ¡ incompletoLas variantes de procesador son: La pseudodirectiva .file es vÃ¡lida solamente cuando se genera ELFLa pseudodirectiva .loc es vÃ¡lida solamente cuando se genera ELFSe esperaba un predicado calificadorEl registro RA se guarda dos veces.No se admite el radical `%s' o es invÃ¡lidoRd y Rm deben ser diferentes en mlaRd y Rm deben ser diferentes en mulRedefiniendo el nÃºmero de entrada para el proceso del sistema %sRedefiniendo el proceso hoja %sOperadores de sufijo `#' redundantesEl registro no es vÃ¡lido para H8/300El registro debe ser R0--R7El registro debe ser RnEl registro debe ser un registro de direcciÃ³nEl registro debe ser ivtp o tvtpEl nombre de registro %s tiene conflictos con el sÃmbolo del mismo nombreSe esperaba un nombre de registroEl nÃºmero de registro (R%ld) para el acceso de double word debe ser par.El nÃºmero de registro debe ser PARNÃºmero de registro fuera de rango 0..%uEl sÃmbolo de registro %s ya estaba definido.Se descarta la anotaciÃ³n del valor del registroLos registros no se pueden usar como un prefijo en la expresiÃ³n indizada [%s]Los registros no se pueden usar en la expresiÃ³n absoluta [%s]Los registros no se pueden usar en la expresiÃ³n inmediata [%s]La relajaciÃ³n nunca debe ocurrirLa relajaciÃ³n a grandes ramificaciones para .arch common_v10_v32 no estÃ¡ implementadaRamificaciÃ³n relajada fuera de rango en un saltoEl formato del fichero objeto no admite la reubicaciÃ³n %dLos valores reubicables requieren por lo menos almacenamiento WORDEl formato del fichero objeto no admite la reubicaciÃ³n %d.La reubicaciÃ³n %s no es segura para %sNo se puede hacer la reubicaciÃ³n cuando se utiliza -mrelocatableLa reubicaciÃ³n no cabe. (valor de reubicaciÃ³n = 0x%lx)Reporte bichos a %s Se usÃ³ la palabra reservada `%s' como un parÃ¡metro en la macro `%s'Rn no debe sobreescribir otros operandosEl Ãndice de registros rotantes debe ser una constante que no sea negativaSe esperaba un registro de co-procesador S+corese esperaba un registro S+coreSe esperaba un registro especial S+coreOpciones de SH: --little genera cÃ³digo little endian --big genera cÃ³digo big endian --relax altera las instrucciones de salto para desubicaciones long --renesas desactiva la optimizaciÃ³n con sÃmbolos de secciÃ³n por compatibilidad con el ensamblador Renesas. --small alinea las secciones a lÃmites de 4 bytes, no 16 --dsp activa insns sh-dsp, y desactiva ISAs de coma flotante. --isa=[any usa la isa mÃ¡s apropiada | dsp igual que '-dsp' | fpNo se permite cÃ³digo SHmedia en la misma secciÃ³n que las constantes y el cÃ³digo SHcompactNo se admite SMC en esta arquitecturano se permiten SP y PC en la directiva .unwind_movspno se permite SP en la lista de registrosOpciones SPARC: Opciones de SPU: --apuasm emula el comportamiento de apuasm el registro base SRS debe ser r13se usa la instrucciÃ³n SSE `%s'No se admite SVC en esta arquitecturaSYMBOL TABLE no estÃ¡ implementadoS^# tal vez sea solamente para acceso de lecturaS^# necesita una expresiÃ³nSe usa el mismo registro fuente/destino (`r%d'), el resultado es indefinidoSe usa el mismo registro fuente/destino (`r%d'), el resultado es indefinidoModo de direccionamiento escalado-indizado combinado con Ãndice-escaladoEl segundo operando de .save contradice a .prologueEl segundo operando de .%s no es una constanteEl segundo operando de .prologue debe ser un registro generalEl segundo operando de .prologue debe ser el primero de %d registros generalesEl segundo operando de .restore debe ser una constante >= 0El segundo operando de .save no es un registro vÃ¡lidoEl segundo operando de .save.b debe ser un registro generalEl segundo operando de .save.b debe ser el primero de %d registros generalesEl segundo operando de .save.g debe ser un registro generalEl segundo operando de .save.g debe ser el primero de %d registros generalesEl segundo operando de .save.gf debe ser una constante de 20-bits que no sea negativaEl segundo operando de .unwabi debe ser una constanteNo se admite el cambio de secciÃ³n en cÃ³digo.Error semÃ¡ntico. Este tipo de operando no se puede reubicar, debe ser una constante en el momento de ensambladoValor de shift > 32. se usa Desbordamiento de la literal short (%ld.), se asume el modo inmediato.El valor inmediato con signo %ld es demasiado grandeEl tamaÃ±o del marco excede el mÃ¡ximo de 96 registrosEl tamaÃ±o de los registros rotantes excede el tamaÃ±o del marcoAlgo se olvidÃ³ de limpiar La fuente y el destino deben ser diferentesLos registros fuente y destino no deben ser iguales`,' sobrante o modo de direccionamiento de registro indirecto errÃ³neo.Operandos espurios; (%d operandos/instrucciÃ³n mÃ¡ximo)Un `#' solo es ilegalLos sÃmbolos de sustituciÃ³n deben empezar con una letraNo se reconoce el subtipo %d.Sunplus-v2-0-0-20060510 No se compilÃ³ el soporte para aritmÃ©tica de 64-bit.Se admiten los siguentes valores de ARQ:Se intercambia el orden de la instrucciÃ³nSe utilizÃ³ el sÃmbolo %s como operando inmediato en modo PIC.No se puede crear el sÃmbolo '%s'.El sÃmbolo `%s' no puede ser dÃ©bil y comÃºn al mismo tiempoSe esperaba un sÃmboloFalta un sÃmbolo Falta el sÃmbolo para .set/.equSe utiliza un sÃmbolo como inmediato para la instrucciÃ³n shiftSe utiliza un sÃmbolo como valor inmediato para instrucciones msrset/msrclrSintaxis en el modo escalado-indizado, utilice [Rn:m] donde n=[0..7] m={b,w,d,q}no se permite la reubicaciÃ³n TLS en el grupo FLIXel tamaÃ±o de la reubicaciÃ³n TLS no coincide con el tamaÃ±o del operandoopciones de TMS320C6000: el tamaÃ±o de la secciÃ³n TOC excede los 64kTOKEN TRACE no estÃ¡ implementadoLa etiqueta debe venir antes del predicado calificador.Se esperaba un nombre de etiquetaAÃºn no se admiten etiquetas en los pseudo-operadores de desenredoEl procesador objetivo no admite esta instrucciÃ³n.No se admite el pseudo-operador ".%s" El operando %s no coincideNo se admite el pseudo-operador .BTEQUNo se admite el pseudo-operador .DEFINENo se admite el pseudo-operador .ENTERNo se admite el pseudo-operador .LEAVENo se admite el pseudo-operador .MACROSe usa el formato de fichero de 64 bit sin instrucciones esame.El formato del fichero XCOFF no admite secciones arbitrariasLa directiva `.abi %s' no es vÃ¡lida para esta arquitecturaLa directiva `.mode %s' no es vÃ¡lida para esta arquitecturaLa opciÃ³n "--no-allow-flix" prohibe flix en ranuras mÃºltiples.El id de trampa debe ser una constante.Esta arquitectura no admite la instrucciÃ³n atomicEsta arquitectura no admite mmuEste ensamblador no admite la generaciÃ³n de procesador %ldEste ensamblador se configurÃ³ para un objetivo `%s'. Este inmediato requiere alineaciÃ³n 0 MOD 16Este inmediato requiere alineaciÃ³n 0 MOD 2Este inmediato requiere alineaciÃ³n 0 MOD 4Este inmediato requiere alineaciÃ³n 0 MOD 8Esta instrucciÃ³n puede ser impredecible si se ejecuta en nÃºcleos M-profile con interrupciones activadas.Esta es la ubicaciÃ³n del uso conflictivoEste operando debe ser una constante al momento de ensamblarEste operador sÃ³lo produce valores de dos bytes.Este programa es software libre; se puede redistribuir bajo los tÃ©rminos de la Licencia PÃºblica General de GNU versiÃ³n 3 o posterior. Este programa no tiene ninguna garantÃa. Thumb no admite NOP con pistasThumb no admite la ejecuciÃ³n condicionalThumb no admite el indizado negativo de registroThumb no admite el indizado de registro con escritura hacia atrÃ¡sThumb no admite el post-indizado de registroThumb no admite la forma con 2 argumentos de esta instrucciÃ³nThumb no admite este modo de direccionamientola codificaciÃ³n Thumb no admite un inmediato aquÃla codificaciÃ³n Thumb no admite rotaciÃ³nno se admiten load/store Thumb mÃºltiples para {reglist}^Thumb sÃ³lo admite LSL en el indizado desplazado de registroMUL de Thumb-2 no debe establecer opcionesla instrucciÃ³n Thumb-2 sÃ³lo es vÃ¡lida en la sintaxis unificadaramificaciÃ³n Thumb2 fuera de rangoFaltan operandos para '%s'.Demasiadas instrucciones para la agrupaciÃ³n.Demasiados operandosSe pasan demasiados operandos a la instrucciÃ³nSe analizaron demasiados operandosDemasiados operandos: %sEl cÃ³digo de captura (%lu) para %s no estÃ¡ en el rango 0..15El id de trampa `%ld' estÃ¡ fuera de rango.El id de trampa debe estar dentro de [0x30..0x39] o [0x40..0xff]Se trata '%-*s' como un sÃmbolo.Se intentÃ³ hacer .set al modo `%s' que no se reconoceSe tratÃ³ de convertir una ramificaciÃ³n relativa a PC a un salto absolutoSe tratÃ³ de establecer el sÃmbolo que no se reconoce: %s Tratando de hacer 'bal' a %sDos instrucciones IU no se pueden ejecutar en paraleloDos instrucciones MU no se pueden ejecutar en paraleloDos instrucciones en el mismo agrupado y ambas escriben al registro %s, lo cual no se permite.No se puede reservar memoria para las instrucciones nuevas No se puede determinar el procesador objetivo por defecto de la cadena: %sNo se puede manejar la referencia al sÃmbolo %sNo se pueden mezclar las instrucciones como se especificÃ³No se puede producir una reubicaciÃ³n contra el sÃmbolo '%s'No se puede resolver la expresiÃ³nSe descarta el operador unario %c porque hay un operando errÃ³neo a continuaciÃ³nParÃ©ntesis sin balancear en el operando %s.ParÃ©ntesis sin balancear en el operando %dArgumento de .EXPORT/.IMPORT indefinido (se descarta): %sConstante absoluta sin definir: '%s'.Registro sin definir: '%s'.Espacio indefinido: '%s' Se asume que el nÃºmero de espacio = 0.SÃmbolo de sustituciÃ³n '%s' sin definirConversiÃ³n de ramificaciÃ³n inesperada con `%x'CarÃ¡cter '%c' inesperado antes del operando %d para %s.Referencia inesperada a un sÃmbolo en una secciÃ³n que no es de cÃ³digoÂ¡Valor de devoluciÃ³n inesperado [%d] de parse_toc_entry! Dependencia %s sin manejar para %s (%s), nota %dSe especificÃ³ el registro sin implementar `%s'Modificador de expresiÃ³n toc32 sin implementarModificador de expresiÃ³n toc64 sin implementarOperando .syntax invÃ¡lidoIdentificador de CPU `%s' desconocidoInstrucciÃ³n TMS320C30 desconocida: %scpu -mcpu=%s desconocidoCpu por defecto desconocido = %s, os = %sExcepciÃ³n desconocida: `%s'Modo de direccionamiento indirecto %s desconocidoInstrucciÃ³n '%s' desconocidaSe desconoce el cÃ³digo de operaciÃ³n `%.*s'.CÃ³digo de operaciÃ³n `%s' desconocidoCÃ³digo de operaciÃ³n desconocido `%s'.CÃ³digo de operaciÃ³n desconocido: `%s'Operador desconocidoRegistro de procesador desconocido (32 bit) : `%d'Registro de procesador desconocido: `%d'ExcepciÃ³n psr `%s' desconocidaPar de registros desconocidos - modo relativo de Ãndice: `%d'Par de registro desconocido: `%d'Registro desconocido: `%d'ReubicaciÃ³n desconocida en md_apply_fix: %sSe encontrÃ³ una reubicaciÃ³n desconocida en md_apply_fix.Operando de reubicaciÃ³n desconocido: !%sTipo de segmento desconocidoPseudo registro temporal desconocidoel tipo de literal de direcciÃ³n no se admite/es desconocidoReubicaciÃ³n high sin coincidenciaReubicaciÃ³n high/shigh sin coincidenciaNo se reconoce la opciÃ³n: -hiddenNo se reconoce la versiÃ³n del cÃ³digo de operaciÃ³n microMIPS de %u-bitNo se reconoce el argumento de .LEVEL No se reconoce el argumento .typeNo se reconoce el cÃ³digo de condiciÃ³n "%s"No se reconoce el especificador de dependencia %d No se reconoce el tipo de campo '%c'No se reconoce la compostura (0x%08lx)No se reconoce el formato de direcciÃ³n indirecta "%s"No se reconoce la instrucciÃ³n "%s"No se reconoce el cÃ³digo de operaciÃ³nNo se reconoce el formato de cÃ³digo de operaciÃ³n: `%s'No se reconoce el cÃ³digo de operaciÃ³n: `%s'No se reconoce la lista de operandos '%s' para la instrucciÃ³n '%s'No se reconoce la opciÃ³n "%s"No se reconoce la opciÃ³n '-x%s'No se reconoce la opciÃ³n a continuaciÃ³n de -KNo se reconoce o no se admite la constante de coma flotanteNo se reconoce la instrucciÃ³n paralela "%s"No se reconoce la instrucciÃ³n paralela '%s'No se reconoce la combinaciÃ³n de instrucciones paralelas "%s || %s"No se reconoce el tipo de relaciÃ³n de predicadoNo se reconoce el nombre de registro `%s'No se reconoce la secciÃ³n '%s'No se reconoce el bit de estado "%s"No se reconoce la marca de struct/union '%s'No se reconoce la funciÃ³n de sÃmbolo de sustituciÃ³nNo se reconoce el sufijo de sÃmboloNo se reconoce la versiÃ³n '%s'El valor inmediato sin signo %ld es demasiado grandeNo se admite el nÃºmero de reubicaciÃ³n MIPS %dNo se admite el tamaÃ±o de compostura %dNo se admite la extensiÃ³n de conjunto de instrucciones: %sNo se admite la constante largeNo se admite la generaciÃ³n de procesador %dNo se admite el tamaÃ±o de reubicaciÃ³n %dNo se admite el atributo de secciÃ³n -- 'a'No se admite el uso de %sNo se admite el uso de .gpdwordNo se admite el uso de .gpwordNo se admite el uso de spCadena sin terminar despuÃ©s de una expresiÃ³n absolutaLa directiva de desenredo no estÃ¡ seguida por una instrucciÃ³n.Modo de empleo: %s [opciÃ³n...] [ficheroasm...] El uso de .def/.ref es obsoleto. Utilice en su lugar .globalEl uso de PC aquÃ es IMPREDECIBLEEl uso de PC aquÃ es obsoletoEl uso de p0 no es vÃ¡lido en este contextoEl uso de r%u como registro fuente es obsoleto cuando r%u es el registro destino.Use la directiva .mmregs para utilizar nombres de registro mapeados en memoria tales como '%s'se utilizÃ³ $%u con ".set at=$%u"Se usÃ³ $at sin ".set noat"Se usaron mÃ¡s registros rotantes que los 48 disponiblesSe usaron mÃ¡s registros rotantes que los 96 disponiblesSe usaron mÃ¡s registros rotantes que los %d declaradosSe usa ENTRY en lugar de CODE en la directiva export para %sEl uso de una constante como el segundo operando de .prologue es obsoletoSe usa el estilo antiguo %%hi(expr), por favor cambie al estilo PPC, expr@h.Se usa el estilo antiguo, %%lo(expr), por favor cambie al estilo PPC, expr@l.Se usa register(r1) temporalOpciones de VAX: -d LONGITUD se descarta -J se descarta -S se descarta -t FILE se descarta -T se descarta -V se descarta los registros VFP deben ser adjacentesSe esperaba un registro de precisiÃ³n simple o doble VFPSe esperaba un registro de precisiÃ³n simple VFPSe esperaba un registro de precisiÃ³n simple o doble VFP, o cuÃ¡druple Neonse esperaba un registro de sistema VFPSe esperaba un registro de precisiÃ³n doble VFP/Neonerror VIP_BEGIN:%sViolaciÃ³n de restricciÃ³n de empaquetado VLIWSe utilizÃ³ empaquetado VLIW para -mno-packOpciones VMS: -+ codifica (no trunca) nombres mÃ¡s largos que 64 caracteres -H muestra el sÃmbolo nuevo despuÃ©s del truncado por dispersiÃ³n -replace/-noreplace activa o desactiva la optimizaciÃ³n de llamadas a procedimiento Opciones de VMS: -+ dispersa los nombres de codificaciÃ³n mÃ¡s largos que 31 caracteres -1 manejo de `const' handling compatible con gcc 1.x -H muestra el sÃmbolo nuevo despuÃ©s del truncado de dispersiÃ³n -h NUM no dispersa nombres con mayÃºsculas y minÃºsculas mezcladas, y ajusta: 0 = mayÃºsculas, 2 = minÃºsculas, 3 = preservar mayÃºsculas/minÃºsculas -v"VERSION" el cÃ³digo a ensamblar fue producido por el compilador "VERSION" El valor %d no cabe en el campo de %d bit con signoEl valor %d no cabe en el campo de %d bit sin signoEl valor %ld es demasiado grande para la ramificaciÃ³n de 8-bit relativa al PC.El valor para ENTRY_FR debe estar en el rango 12..21 El valor para ENTRY_GR debe estar en el rango 3..18 El valor para ENTRY_SR debe ser 3 Ya se habÃa especificado el valor para el parÃ¡metro `%s' de la macro `%s'El valor no estÃ¡ en el rango de 16 bit: %ldEl valor no estÃ¡ en el rango de 16 bit con signo: %ldEl valor no estÃ¡ en el rango de 4 bit sin signo: %ldEl valor no estÃ¡ en el rango de 5 bit sin signo: %ldEl valor no estÃ¡ en el rango de 6 bit: %ldEl valor no estÃ¡ en el rango de 6 bit sin signo: %ldEl valor no estÃ¡ en el rango de 8 bit: %ldEl valor no estÃ¡ en el rango de 8 bit con signo: %ldValor fuera del rango de 16-bit.Valor truncado a 62 bitsSe accede a la variable usando un ancla de sÃ³lo lectura de datos small, pero no estÃ¡ en la secciÃ³n de sÃ³lo lectura de datos smallSe accede a la variable usando un ancla de lectura escritura de datos smaill, pero no estÃ¡ en la secciÃ³n de lectura escritura de datos smallInstrucciÃ³n muy corta para la opciÃ³n, p.e. no lo puede hacer en un NULLstrMemoria agotadaAviso:Aviso: Aviso: condicional fuera de un bloque IT para Thumb.Aviso: registro duplicado (r%d) en la lista de registrosAviso: error interno: se olvida definir endndx de %sAviso: el rango de registros no estÃ¡ en orden ascendenteNo se permiten las escrituras al registro '%s'.DesubicaciÃ³n errÃ³nea %dNÃºmero errÃ³neo de operandos de entradaNÃºmero errÃ³neo de operandosNÃºmero errÃ³neo de operandos de salidaNÃºmero errÃ³neo de operandos por defecto, revise ns32k-opcodes.hRegistro errÃ³neo en la lista de registros de coma flotanteRegistro errÃ³neo en el modo indirecto de registro.TamaÃ±o de instrucciÃ³n errÃ³neo en una ranura de retardo de ramificaciÃ³n de %u-bitTamaÃ±o de registro puntero errÃ³neo para la arquitectura.se esperaba un registro acumulador XScaleno se admite la opciÃ³n de literales absolutos Xtensa; se descartalas etiquetas [0-9]H no se mezclan con pseudo-puntoslas etiquetas [0-9]H no pueden aparecer solas en una lÃneaÃndice [PC] prohibido[]Ãndice igual que ()+registro: impredecible[]Ãndice igual que -()registro: impredecible[no-]generics es obsoleto; utilice en su lugar [no-]transform[no-]relax es obsoleto; utilice en su lugar [no-]transformel sÃmbolo [tocv] no es un sÃmbolo de tabla de contenidono se permite `%s%s' con `%s%c'`%s' CombinaciÃ³n de registros-cuenta ilegal.`%s' Uso invÃ¡lido de registro.`%s' Uso invÃ¡lido de registros.`%s' no se puede igualar al sÃmbolo comÃºn '%s'`%s' no puede ir en %s de la plantilla %s`%s' no puede ser predicado`%s' no cabe en la plantilla %s`%s' no cabe en el grupo`%s' tiene un resultado indefinidoel sÃmbolo `%s' ya es el alias de %s `%s'la opciÃ³n `%s' es obsoleta, use %s`%s' no es una expresiÃ³n %s vÃ¡lida`%1$s' no es una expresiÃ³n %3$s de %2$s-bit vÃ¡lida`%s' no es un calificador de parÃ¡metro vÃ¡lido para `%s' en la macro `%s'`%s' no se admite en modo de 64-bit`%s' no se admite en `%s%s'`%s' no se admite en `%s'`%s' no es vÃ¡lido aquÃ (se esperaba `%c%s%s%c')`%s' sÃ³lo se admite en modo de 64-bit`%s' debe ser el Ãºltimo en el grupo`%s' debe ser el Ãºltimo en el grupo de instrucciones`%s' operando %d debe usar el segmento `%ses'`%s' debe ser un operando para este .endpsÃmbolo `%s' sin una funciÃ³n precedente`%s' ya estÃ¡ definidaYa se usÃ³ `%s' como nombre de parÃ¡metro (o nombre local)`%s' no se definiÃ³ dentro del procedimiento`%s' no se especificÃ³ con el .proc previono se admite el operador de nÃºmero serial `&'se requiere `)'se requiere `,'`.abi 32' pero las opciones de la lÃnea de Ã³rdenes no especifica la ABI de 32-bit`.abi 64' pero las opciones de la lÃnea de Ã³rdenes no especifica la ABI de 64-bit`af' debe aparecer solo`micromips' no se puede usar con `mips16'`mips16' no se puede usar con `micromips'se debe establecer `noreorder' antes de `nomacro'un nÃºmero grande con subrayados no puede tener mÃ¡s de 8 dÃgitos hexadecimales en cualquier palabraun nÃºmero grande con subrayados debe tener exactamente 4 wordsun registro no tiene direcciÃ³nuna reubicaciÃ³n en este operando implica un desbordamientose requiere una expresiÃ³n absolutano se admiten las secciones absolutasse usÃ³ addend con $DSBT_INDEXla direcciÃ³n de desplazamiento se debe alinear con half wordla direcciÃ³n de desplazamiento se debe alinear con wordla direcciÃ³n prohibe #la direcciÃ³n prohibe ()la direcciÃ³n prohibe ()+la direcciÃ³n prohibe -()la direcciÃ³n prohibe @la direcciÃ³n prohibe []la direcciÃ³n prohibe un especificador de longitud de desubicaciÃ³nla direcciÃ³n prohibe un registrodirecciÃ³n demasiado alta para la tabla de vectores jmp/jsrno se admite el modo de direccionamientoalias = %s la alineaciÃ³n no es un nÃºmero positivola alineaciÃ³n no es una potencia de 2la alineaciÃ³n debe ser constantealineaciÃ³n negativa. Se asume 0.alineaciÃ³n negativa; se asume 0la alineaciÃ³n no es una potencia de 2el relleno de alineaciÃ³n (%lu bytes) no es un mÃºltiplo de %ldalineaciÃ³n demasiado grande: se asume %dla alineaciÃ³n es demasiado grande: se asume %ualineaciÃ³n demasiado grande; se asume %dalineaciÃ³n demasiado grande; se asume %dalineaciÃ³n demasiado grande; se asume %ldno se admiten las alineaciones mÃ¡s grandes que %d bytes en las secciones .text.las instrucciones ya estÃ¡n ensambladascombinaciÃ³n de opciones ambigua - se descarta la directiva '.profiler'.tamaÃ±o de operando de memoria ambiguo para `%s'tamaÃ±o de operando ambiguo para `%s'no se permite la extensiÃ³n de arquitectura `%s' para la arquitectura base actuallas extensiones de arquitectura se deben especificar en orden alfabÃ©ticono se reconoce la arquitectura `%s'la arquitectura saltÃ³ de "%s" a "%s" en "%s"las caracterÃsticas de la arquitectura estÃ¡n activadas y desactivadas al mismo tiempola arquitectura del cÃ³digo de operaciÃ³n tiene conflictos con alguno de una(s) instrucciÃ³n(es) anterior(es)los registros arg/static se sobreescribenensambla cÃ³digo Thumbensambla para big-endianensambla para little-endianno se estableciÃ³ el estado de ensamblado para el primer fragmento en la secciÃ³n %sse asume que todos los miembros del grupo `%s' son COMDATse asume una alineaciÃ³n de sÃmbolo de cerosÃ³lo se permiten hasta %d operandos de desubicaciÃ³nsÃ³lo se permiten cuando mucho %d operandos inmediatosal adjuntar el encabezado de copyright %s: %sal adjuntar el encabezado de versiÃ³n %s: %sÂ¿se intentÃ³ hacer .org/.space hacia atrÃ¡s? (%ld)Â¿se intentÃ³ hacer .space/.bes hacia atrÃ¡s? (%ld)se intentÃ³ alojar datos en la secciÃ³n absolutase intentÃ³ alojar datos en la secciÃ³n comÃºnse intentÃ³ ramificar en un segmento diferentese intentÃ³ obtener el valor del sÃmbolo sin resolver `%s'se intentÃ³ mover .org hacia atrÃ¡sse intentÃ³ redefinir el sÃmbolo: %sse intentÃ³ redefinir el sÃmbolo `%s'se intentÃ³ redefinir `%s' con una longitud diferentese descarta el intento de redefinir el pseudo-operador `%s'se intenta redefinir el sÃmbolose intentÃ³ redefinir el alias con tipose intentÃ³ almacenar un valor en la secciÃ³n absolutase intentÃ³ usar una instrucciÃ³n ARM en un procesador que sÃ³lo es Thumb -- `%s'referencia hacia atrÃ¡s a la etiqueta desconocida "%d:"segmento .common %s errÃ³neodirectiva .fmask errÃ³neadirectiva .frame errÃ³neaformato de .longcall errÃ³neodirectiva .mask errÃ³neaformato de .relax errÃ³neosegmento .reserve errÃ³neo -- se esperaba el segmento BSSdirectiva .section errÃ³nea: se quiere a,l,w,x,M,S,G,T en la cadenadirectiva .section errÃ³nea: se quiere a,o,s,w,x,M,S,G,T en la cadenadirectiva .section errÃ³nea: se quiere a,s,w,x,M,S,G,T en la cadenadirectiva .section errÃ³nea: se quiere a,v,w,x,M,S en la cadenadirectiva .section errÃ³nea: se quiere a,w,x,M,S,G,T en la cadenaformato de .uses errÃ³neodirectiva .weakext errÃ³neainformaciÃ³n de depuraciÃ³n COFF errÃ³neaalineaciÃ³n errÃ³neaalineaciÃ³n errÃ³nea de %d bytes en el conjunto de literalesargumento errÃ³neo para la directiva sse_check.argumento errÃ³neo para la directiva syntax.argumentos errÃ³neos para la instrucciÃ³ntipo de barrera errÃ³neoregistro base errÃ³neo: debe ser r0se especificÃ³ una mÃ¡scara de bit errÃ³nea despuÃ©s de APSRÃndice de vector de byte errÃ³neo (%ld)llamada errÃ³nea a MD_ATOF()llamada errÃ³nea a md_atofoperando de salida pmuls mal combinadoid de coprocesador errÃ³neodefsym errÃ³neo; el formato es --defsym nombre=valorcarÃ¡cter escapado errÃ³neamente en la cadenaexpresiÃ³n errÃ³neasintaxis de expresiÃ³n errÃ³nealiteral de coma flotante errÃ³nea: %sconstante de coma flotante errÃ³nea: desbordamiento del exponenteconstante de coma flotante errÃ³nea: cÃ³digo de error desconocido=%dformato errÃ³neo para ifc Ã³ ifncformato errÃ³neo de OPT NEST=profundidadfragmento errÃ³neo en %p: fix %ld dir %ld %ld unidad funcional errÃ³nea para el operando %u de '%.*s'valor inmediato errÃ³neo para el desplazamiento de 8-bit (%ld)valor inmediato errÃ³neo para el desplazamiento (%ld)instrucciÃ³n `%s' errÃ³neaformato de instrucciÃ³n errÃ³neosintaxis de instrucciÃ³n errÃ³neasintaxis de instrucciÃ³n errÃ³nealongitud de lista errÃ³nealongitud de lista errÃ³nea para la bÃºsqueda de tablatipo de lista errÃ³neo para la instrucciÃ³ntamaÃ±o de literal errÃ³neo operando de memoria `%s' errÃ³neonÃºmero errÃ³neo de operandos para '%.*s'desplazamiento errÃ³neo 0x%08lX (debe ser un nÃºmero de 8-bit de words)desplazamiento errÃ³neo 0x%08lX (debe ser alineado a word)desplazamiento errÃ³neo 0x%08lX (sÃ³lo hay 12 bits disponibles para esta magnitud)desplazamiento errÃ³neo 0x%08lX (sÃ³lo hay 8 bits disponibles para esta magnitud)sintaxis de expresiÃ³n de desplazamiento errÃ³neacÃ³digo de operaciÃ³n u operandos errÃ³neosoperando %u errÃ³neo de '%.*s'combinaciÃ³n de operandos errÃ³nea para '%.*s'expresiÃ³n absoluta errÃ³nea o irreducibleexpresiÃ³n absoluta errÃ³nea o irreducible; se asume ceronÃºmero de co-procesador errÃ³neo o faltantetipo de reubicaciÃ³n errÃ³nea o sin manejar: 0x%02xnÃºmero de rutina personality errÃ³neopredicado '%s' errÃ³neorango errÃ³neo en la lista de registrosexpresiÃ³n de registro invÃ¡lidaregistro errÃ³neo para mrsregistro errÃ³neo para el operando %u de '%.*s'registro errÃ³neo para el post-Ãndiceregistro errÃ³neo en []lista de registros errÃ³nealista de registros errÃ³nea: %snombre de registro `%s' errÃ³neonombre de registro errÃ³neo: %snÃºmero de registro errÃ³neo: %sregistro o pareja de registros errÃ³neos para el operando %u de '%.*s'pareja de registros errÃ³nea para el operando %u de '%.*s'rango de registro errÃ³neoestado de relajaciÃ³n errÃ³neoexpresiÃ³n de reubicaciÃ³n errÃ³neaexpresiÃ³n de reubicaciÃ³n errÃ³nea para '%s'tipo de compostura de reubicaciÃ³n invÃ¡lido (%d)tipo de reubicaciÃ³n errÃ³neo: 0x%02xsegmento errÃ³neotamaÃ±o errÃ³neo %d en el especificador de tiporegistro de inicio errÃ³neo: r0 y r15 invÃ¡lidosconstante de cadena errÃ³neasufijo de sÃmbolo errÃ³neotipo errÃ³neo para el registrotipo errÃ³neo para el escalartipo errÃ³neo en la instrucciÃ³n Neonespecificador psr errÃ³neo/faltantedirectiva .dim mal formadase descarta la directiva .dim formada errÃ³neamentedirectiva .size mal formadase descarta la directiva .weak formada errÃ³neamentese esperaba un registro basese especificÃ³ el registro base pero es ceroel registro base se escribiÃ³ hacia atrÃ¡s, y sobreescribe el segundo registro de transferenciaobjetivo-bfd = %s bfd_set_section_flags: %sno se admite el modo big endianbignum invÃ¡lidobignum invÃ¡lido; se asume cerose truncÃ³ el nÃºmero grande a %d bytesel campo de bits se extiende mÃ¡s allÃ¡ del final del registroblx a '%s' cambiÃ³ una funciÃ³n de estado ISA de ARM a blblx a la funciÃ³n Thumb '%s' cambiÃ³ del estado ISA Thumb a blambas insns para !gpdisp!%ld deben estar en la misma secciÃ³nÂ¡Registro br_gr antes del registro de regiÃ³n!Â¡Registro br_mem antes del registro de regiÃ³n!bra o bsr con sÃmbolo indefinido.desbordamiento de rango de salto de direcciÃ³n (0x%lx)branch debe ser la Ãºltima instrucciÃ³n en el bloque ITel operando de ramificaciÃ³n tiene un desplazamiento impar (%lx) ramificaciÃ³n fuera de rangopredicciÃ³n de ramificaciÃ³n invÃ¡lida en este cÃ³digo de operaciÃ³nla frecuencia de ramificaciÃ³n de objetivo debe ser mayor a 0ramificaciÃ³n a una direcciÃ³n mal alineada (0x%lx)la ramificaciÃ³n o salto al final de un ciclo puede activar errores de hardwarebreak fuera de un loop estructuradoDesubicaciÃ³n de byte fuera de rangobyte o halfword no vÃ¡lido para el registro basese llama a md_convert_frag llamada a md_convert_frag se llama a md_estimate_size_before_relax llamada a md_estimate_size_before_relax llamada a tc_aout_fix_to_chars objetivo call/jmp fuera de rango (1)objetivo call/jmp fuera de rango (2)no se puede hacer la reubicaciÃ³n relativa a pc de %d bytesno se puede hacer la reubicaciÃ³n de %d bytesno se puede resolver la expresiÃ³nsolamente se pueden cargar dos registros consecutivossolamente se pueden almacenar dos registros consecutivossolamente se pueden transferir dos registros consecutivosno se puede []indizar un registro, porque no tiene direcciÃ³nno se puede cambiar el Ãndice para el operandono se puede cerrar %s: %sno se puede cerrar `%s'no se puede crear %s: %sno se puede crear un grupo: %sno se puede crear la secciÃ³n %sno se puede codificar el registro '%s%s' en una instrucciÃ³n que requiere el prefijo REX.no se pueden extender el fragmentono se pueden extender %u caracteres de fragmentono se puede encontrar la compostura seÃ±alada por .usesno se puede encontrar el cÃ³digo de operaciÃ³nno se puede encontrar el cÃ³digo de operaciÃ³n no se puede encontrar el cÃ³digo de operaciÃ³n previo no se puede manejar la expresiÃ³naÃºn no se puede manejar la generaciÃ³n de literales/etiquetasno se puede manejar un segmento no absoluto en `%s'no se puede manejar un OP TYPE sin definirno se puede tener una reubicaciÃ³n para ipushno se puede hacer global el sÃmbolo de registro `%s'no se pueden mezclar argumentos posicionales y palabras claveno se puede abrir %s para lectura: %sno se puede abrir %s: %sno se puede abrir `%s' para escriturano se puede abrir un bfd en la salida estÃ¡ndar %sno se puede abrir el fichero de biblioteca de macro '%s' para lectura: %sno se puede decodificar la lista de registrosno se puede predecrementarno se puede leer de %s: %sno se puede redefinir el Ãndice de un alias escalarno se redefinir el tipo de un alias de registrono se puede redefinir el tipo para el operandono se puede resolver `%s' {secciÃ³n %s} - `%s' {secciÃ³n %s}no se puede resolver el valor para el sÃmbolo `%s'no se pueden establecer las opciones para la secciÃ³n %sno se puede iniciar la escritura de la secciÃ³n .mdebug: %sno se puede utilizar el formato COBR con una etiqueta externano se puede usar un registro Neon cuÃ¡druple aquÃno se puede usar R0 aquÃno se puede usar la alineaciÃ³n con esta instrucciÃ³nno se puede usar la parte alta del registro en el operando %dno se puede utilizar el registro '%s%s' como operando %d en '%s'.no se puede escribir %s: %sno se puede ensamblar en un fragmento literalno se puede predecrementar y postincrementarno se puede ramificar a una direcciÃ³n imparno se puede combinar index con optionno se puede combinar pre y post-indizadono se pueden comprimir las secciones de depuraciÃ³n (zlib no estÃ¡ instalado)no se puede convertir el sÃmbolo de expresiÃ³n %s a una reubicaciÃ³n complejano se puede crear el nÃºmero de coma flotanteno se puede decodificar el formato de instrucciÃ³nno se puede definir el sÃmbolo `%s' en la secciÃ³n absolutano se puede determinar el tamaÃ±o de la instrucciÃ³n Thumb. Use en su lugar .inst.n/.inst.wno se puede hacer la reubicaciÃ³n %s de %u bytesno se puede hacer la reubicaciÃ³n relativa a pc de %u bytesno se puede emitir la reubicaciÃ³n %s relativa a PCno se puede emitir la reubicaciÃ³n %s relativa a PC contra %sno se puede emitir la reubicaciÃ³n %s relativa al PC%s%sno se puede emitir la reubicaciÃ³n %s contra el sÃmbolo subsy %sno se puede codificar el cÃ³digo de operaciÃ³n "%s"no se puede codificar el cÃ³digo de operaciÃ³n "%s" en el formato dado "%s"no se puede generar el tipo de reubicaciÃ³n para el sÃmbolo %s, cÃ³digo %sno se puede honrar el sufijo de anchura -- `%s'no se puede hacer un salto relativo a una ubicaciÃ³n absolutano se puede enmascarar la instrucciÃ³n sin una unidad funcionalno se pueden empaquetar %s y %s juntosno se pueden empaquetar %s y %s juntos con una insn de 16-bitno se puede empaquetar %s en la ranura P1no se puede empaquetar %s con una insn de 16-bitno se puede representar la reubicaciÃ³n %s en este formato de fichero objetono se puede representar la reubicaciÃ³n %s en este fichero objeto format1no se puede representar la reubicaciÃ³n `%s' en el fichero objetono se puede representar el tipo de reubicaciÃ³n %sno se puede representar el tipo de reubicaciÃ³n %s en modo x32no se puede resolver el parÃ¡metro @slotcountno se puede establecer literal_prefix dentro de un fragmento literalno se puede usar post-indizado con el direccionamiento relativo al PCno se puede usar post-indizado con esta instrucciÃ³nno se puede usar el Ãndice de registro con direccionamiento relativo al PCno se puede usar el Ãndice de registro con esta instrucciÃ³nno se puede usar escritura hacia atrÃ¡s con el direccionamiento relativo al PCno se puede usar escritura hacia atrÃ¡s con esta instrucciÃ³nno se puede escribir al fichero de salida '%s': %scanÃ³nico = %s la constante de carÃ¡cter es demasiado grandeel carÃ¡cter a continuaciÃ³n del nombre no es '#'cmpu no admite el cÃ³digo de condiciÃ³n %sdesplazamiento de coprocesador fuera de rangose esperaba un registro de co-procesadorel cÃ³digo es conforme a ATPCSel cÃ³digo utiliza un contador de programa de 26-bitel cÃ³digo utiliza un contador de programa de 32-bitse esperaba una comafalta una coma en .xstabscÃ³digo de condiciÃ³n invÃ¡lido para jrel valor del cÃ³digo de condiciÃ³n (%d) es demasiado grandela condiciÃ³n no estÃ¡ seguida por una insn condicionalizablese requiere una condiciÃ³nla condiciÃ³n sa no se puede usar aquÃramificaciÃ³n condicional a continuaciÃ³n del conjunto de opcionesla ramificaciÃ³n condicional o el operando de insn jal se refiere a R%ld de la insn aritmÃ©tica o lÃ³gica previa.ramificaciÃ³n condicional fuera de rangolos infijos condicionales son obsoletos en la sintaxis unificadaexpresiones de reubicaciÃ³n confusasconfusiÃ³n en los parÃ¡metros formalesse esperaba una expresiÃ³n constantese esperaba una expresiÃ³n constante o una lista de registrosse requiere una expresiÃ³n constanteconstante fuera del rango de 8-bit: %dla constante es demasiado grande para caber en la instrucciÃ³nse requiere un valor constanteel registro de control '%s' no se admite en esta arquitecturase esperaba un registro de control, pero se vio '%.6s'convert_frag las longitudes de las insns core y copro deben ser en total 32 bits.las longitudes de las insns core y copro deben ser en total 64 bits.el valor de registro core (%d) es demasiado grandeno se puede ensamblar: %sno se puede construir la transiciÃ³n para %s => %sno se puede decodificar INSN_PATTERN '%s'no se puede decodificar INSN_REPL '%s'no se pueden establecer la arquitectura y la mÃ¡quinano se puede saltar a %ld en el fichero `%s'no se pueden actualizar la arquitectura y la mÃ¡quinano se puede escribir la secciÃ³n .mdebug: %sno se puede encontrar un formato de instrucciÃ³n vÃ¡lidono se reconoce el cpu `%s'tipo-cpu = %s cr%ld es un registro de control reservadose utilizÃ³ una reubicaciÃ³n ctoff() en una instrucciÃ³n que no la admiteubicaciÃ³n de MULS/MULU peligrosa; dÃ©les una alineaciÃ³n superiordependencia de datos %s %s -- %s %s (burbuja %d/%d)elemento de datos con una alineaciÃ³n mÃ¡s grande que la ubicaciÃ³ndest y source1 deben ser el mismo registrodest debe sobreescribir un registro fuentedestinoel destino para add/substract sÃ³lo puede ser R2 o R3el destino para multiply sÃ³lo puede ser R0 o R1el operando de destino debe ser un registro de 16 bitel operando de destino debe ser una direcciÃ³n absoluta de 16bitel operando de destino debe ser un registro de 8 bitel registro de destino es el mismo para insns paralelasel registro de destino se modificÃ³ por la direcciÃ³n de desplazamiento-post-modificadael registro destino debe ser r1el registro destino es el mismo que la base de escritura-hacia-atrÃ¡sse detectÃ³ el uso de un registro global que no estÃ¡ cubierto por el pseudo-operador .registersÃ³lo se admite la diferencia de dos sÃmbolos con .long .short o .bytela directiva %s no se puede negarse encontrÃ³ una directiva .big cuando se requiriÃ³ una opciÃ³n -bigse encontrÃ³ una directiva .little cuando se requiriÃ³ una opciÃ³n -littleno se admite una directiva LOC desde dentro de una pareja BSPEC/ESPECla directiva LOCAL debe estar colocada en el cÃ³digo o en los datoslas directivas no son vÃ¡lidas dentro de una agrupaciÃ³ndiscriminador menor que ceroel desplazamiento debe ser un nÃºmero de 8-bit sin signola desubicaciÃ³n desborda el campo de 12-bitsla desubicaciÃ³n desborda el campo de 8-bitsla desubicaciÃ³n del sÃmbolo definido %s desborda el campo de 12-bitsla desubicaciÃ³n del sÃmbolo definido %s desborda el campo de 8-bitsla desubicaciÃ³n del sÃmbolo indefinido %s desborda el campo de 12-bitsla desubicaciÃ³n del sÃmbolo indefinido %s desborda el campo de 8-bitsdesubicaciÃ³n demasiado grande (%d)desubicaciÃ³n demasiado grande para esta arquitectura; necesita 68020 o superiordiv / mul son instrucciones reservadasdivisiÃ³n por cerodivisiÃ³n por cero al establecer `%s'Se usa dla para cargar registros de 32-bitno avisa del uso de una opciÃ³n obsoletano coincide begin %s%s en %s:%dno use la sintaxis Rn-Rm sin un estribo que no sea unidadel registro droping %d en la secciÃ³n %s no coincide con el registro using %del registro droping %d en la secciÃ³n %s se usÃ³ previamente en la secciÃ³n %sel valor de desplazamiento inmediato dsp no es constante!tlsgd!%ld duplicado!tlsldm!%ld duplicado".else" duplicadodirectiva .fnstart duplicadadirectiva .handlerdata duplicadadirectiva .personality duplicadadirectiva .personalityindex duplicadase descarta el operador datalabel duplicadoinstrucciÃ³n duplicada %smacro duplicado %sespecificador de bit psr duplicadolos elementos deben ser menores que la regiÃ³n de reversaelse sin if coincidenteemit_one_bundle: operador dinÃ¡mico inesperadocampo de etiqueta vacÃo para ISnombre de sÃmbolo vacÃo en .def; se descartalas emulaciones no se manejan en esta configuraciÃ³nfin de fichero despuÃ©s de una comilla de un carÃ¡cter; se insertÃ³ \0fin de fichero en el comentariofin de fichero en comentario; se insertÃ³ una lÃnea nuevafin de fichero en carÃ¡cter de escapefin de fichero en comentario multilÃneasfin de fichero en la cadena; se insertÃ³ '%c'fin de fichero dentro de un condicionalel fin de fichero no estÃ¡ al final de una lÃnea: se insertÃ³ lÃnea nuevafin de macro dentro de un condicionalerror de fin de lÃneaendf sin forendi sin if coincidenteel registro final debe ser r15endw sin whileno se especificÃ³ el tamaÃ±o de entidad para SHF_MERGEinstrucciÃ³n entry con decremento de pila < 16error al construir la tabla de pseudo-operadores %s: %serror al decodificar la lista de elementos/estructuraerror al establecer las opciones para "%s": %serror al establecer las opciones para ".sbss": %stamaÃ±o estimado se llamÃ³ a estimate_size_before_relaxse requieren un nÃºmero de registro parse requiere un registro parexceso de operandos para %sexceso de operandos: '%s'se esperaba #constantse esperaba %cse esperaba , se esperaba .L, .W Ã³ .B para el registro en modo de direccionamiento indizadose esperaban 0 operandos para la etiqueta generadase esperaba 0 Ã³ 1se esperaba un operando o o se esperaba se esperaba , se esperaba , se esperaba , se esperaba @(exp, reg16)se esperaba el registro EPse esperaba que `%s' ya estuviera definido para .vtable_inheritse esperaba una expresiÃ³n de direcciÃ³nse esperaba alineaciÃ³n despuÃ©s del tamaÃ±ose esperaba un parÃ©ntesis que cierrase esperaba una comase esperaba una coma despuÃ©s de "%s"se esperaba una coma despuÃ©s del nombre "%s"se esperaba una coma despuÃ©s del nombre `%s' en la directiva .sizese esperaba una coma despuÃ©s del nombre en .symverse esperaba una coma despuÃ©s del nombre en .vtable_entryse esperaba una coma despuÃ©s del nombre en .vtable_inheritse esperaba una coma despuÃ©s del cÃ³digo de operaciÃ³nse esperaba una coma despuÃ©s del nombre de operandose esperaba una coma despuÃ©s del modo de registrose esperaba una coma despuÃ©s del nÃºmero de registrose esperaba una coma despuÃ©s del subcÃ³digo de operaciÃ³nse esperaba una coma despuÃ©s de la clase de sufijose esperaba una coma despuÃ©s del nombre del sÃmbolose esperaba coma o punto y coma despuÃ©s del nombre del sÃmbolo: se descarta el resto de la lÃnease esperaba una expresiÃ³nfalta el patrÃ³n de relleno esperadose esperaba una constante numÃ©ricase esperaba un operando para la literal generadase esperaba una cadena entre comillasse esperaba un registrose esperaba una lista de registrosse esperaba un nÃºmero simplese esperaba un sÃmbolose esperaba un nombre de sÃmbolose esperaba un modo de direccionamiento vÃ¡lido para mova: "@(disp, ea.sz),ERn"se esperaba }se esperaba )se esperaba ]se esperaba `)' despuÃ©s del factor de escala en `%s'se esperaba `,' Ã³ `)' despuÃ©s del registro base en `%s'se esperaba `,' Ã³ `)' despuÃ©s del registro Ãndice en `%s'se espera un registro para el operando %dse esperan operandos delimitados por comasse esperan operandos de registro delimitados por comasse espera ON u OFF despuÃ©s de .listse esperaba un registro Ãndice o un factor de escala despuÃ©s de `,'; se obtuvo '%c'se espera el registro indirecto `($rA)'se espera el registro indirecto `($rX)'se espera una instrucciÃ³n bloqueable despuÃ©s de `lock'se esperaba un mnemÃ³nico; se obtuvo nadase esperaba un operando despuÃ©s de ','; se obtuvo nadase esperaba un operando antes de ','; se obtuvo nadase esperaba un prefijo; se obtuvo nadase espera un registrose esperaba un factor de escala de 1, 2, 4, u 8: se obtuvo `%s'se espera una instrucciÃ³n de cadena despuÃ©s de `%s'se esperaba {expr.c(operando): valor de devoluciÃ³n %d atof_generic errÃ³neola expresiÃ³n no cabe en BYTEla expresiÃ³n no cabe en WORDerror de expresiÃ³nla expresiÃ³n debe ser constantela expresiÃ³n no es una constanteexpresiÃ³n fuera de rango: se cambia por defecto a 0expresiÃ³n fuera de rango: se cambia por defecto a 1error sintÃ¡ctico en la expresiÃ³nexpresiÃ³n demasiado complejaexpresiÃ³n demasiado compleja de sÃmbolo de cÃ³digoinstrucciÃ³n extendida en ranura de retardose solicitÃ³ un operando extendido pero se necesitano se reconoce la extensiÃ³n `%s'la extensiÃ³n no se aplica a la arquitectura basese descartan los argumentos extra de .LABEL.llave que cierra extrapunto y coma extracoma extrallave que abre extrase descarta los elementos extra en la lÃneadesplazamiento extraÃ±o como parte del operando para la insn shiftfallÃ³ para %d fallÃ³ la prueba de sanidad de registro general.fallÃ³ la prueba de sanidad regnum.fallÃ³ la prueba de sanidadfallÃ³ la prueba de sanidad.fallÃ³ la prueba de sanidad: long_jumpfallÃ³ la prueba de sanidad: short_jumpfallÃ³ la prueba de sanidad de la insn case especialfallÃ³ al leer la tabla de instrucciones %s fallÃ³ al establecer la informaciÃ³n de depuraciÃ³n: %s.file falso despuÃ©s del realla frecuencia de caÃda debe ser mayor a 0el campo fx_size es demasiado pequeÃ±o para contener %del tamaÃ±o del campo debe ser 16 cuando el valor es reubicableel valor del campo "%s" es demasiado complejo para un campo de bitsse trunca valor del campola anchura de campo "%s" es demasiado compleja para un campo de bitsla anchura de campo %lu es demasiado grande para caber en %d bytes: se truncÃ³ a %d bitsquintoel fichero terminÃ³ con un bloque IT abierto.no se encontrÃ³ el fichero: %sel nÃºmero de fichero %ld ya estÃ¡ reservadonÃºmero de fichero menor que unoel nombre de fichero sobrepasa el lÃmite de una pÃ¡ginaprimeroel primer y segundo operandos deben ser el mismo registroel primer operando es nÃºmero de coma flotanteel primer operando es demasiado grande para entero con signo de 16-bitel primer operando es demasiado grande para un desplazamiento de 24-bitel primer registro debe ser r4el primer registro de transferencia debe ser parno se movieron todas las composturas de %sse esperaba una opciÃ³n para la instrucciÃ³n {c}psrlos argumentos de coma flotante estÃ¡n en los registros de coma flotanteconstante de coma flotante demasiado grandenÃºmero de coma flotante invÃ¡lidonÃºmero de coma flotante invÃ¡lido; se asume cerolos nÃºmeros de coma flotante no estÃ¡n implementadosel formato '%s' permite %d ranuras, pero hay %d cÃ³digos de operaciÃ³nformato = %s los nombres de formato sÃ³lo son vÃ¡lidos dentro de agregadosse encontraron %d operandos para '%s': Se esperaban %dse encontraron demasiados (%d) operandos para '%s': Se esperaban %dcuartoÂ¡Registro fr_mem antes del registro de regiÃ³n!fr_var %lu < longitud %dfr_var (%ld) < longitud (%d)se esperaba un registro de marco, se usa $%d.Â¡Registro frgr_mem antes del registro de regiÃ³n!la unidad funcional ya estÃ¡ enmascaradala unidad funcional ya estÃ¡ enmascarada para el operando %u de '%.*s'la unidad funcional ya estÃ¡ en uso en este paquete de ejecuciÃ³nse descarta la basura despuÃ©s de la especificaciÃ³n del Ãndicebasura al final de la lÃneabasura a continuaciÃ³n de la instrucciÃ³ngenera cÃ³digo PICget_expanded_loop_offset: cÃ³digo de operaciÃ³n invÃ¡lidoÂ¡Registro gr_gr antes del registro de regiÃ³n!Â¡Registro gr_mem antes del registro de regiÃ³n!no se especificÃ³ el tamaÃ±o de entidad para SHF_GROUPla secciÃ³n de grupo `%s' no tiene firma de grupohandlerdata en un marco cantunwindhard-float tiene conflictos con la unidad de coma flotante (fpu) especificadadivide por hardwaresi tiene el registro base en la lista de registros al usar escritura hacia atrÃ¡s se vuelve IMPREDECIBLEaquÃ estÃ¡ el "else" del condicional sin terminaraquÃ estÃ¡ el ".else" anterioraquÃ estÃ¡ el ".if" anterioraquÃ es el inicio del condicional sin terminarse utilizÃ³ una reubicaciÃ³n hi() en una instrucciÃ³n que no la admitese utilizÃ³ una reubicaciÃ³n hi0() en una instrucciÃ³n que no la admitese establecieron los bits altos en la expresiÃ³n de lista de registrosno se puede usar la pista en la unidad Bla pista en la unidad B se puede tratar como nophint.b se puede tratar como nopno se debe usar hint.bse esperaba un registro de control iWMMXtse esperaba un registro de datos o control iWMMXtse esperaba un registro de datos iWMMXtse esperaba un registro escalar iWMMXtia64.md_begin: no se puede dispersar `%s': %sidentificador+constante@%s significa identificador@%s+constanteidentificador+constante@got significa identificador@got+constantesi el registro de escritura hacia atrÃ¡s estÃ¡ en la lista, debe ser el registro mÃ¡s bajo en la listase descarta el intento de redefinir el sÃmbolose descarta el intento de redefinir el sÃmbolo interno '%s'se ignora el intento de redefinir el sÃmbolo %sse descarta el intento de usar .unreq en un nombre de registro interno fijo: '%s'se descarta la alineaciÃ³n errÃ³nease descartan los atributos de secciÃ³n cambiados para %sse descarta el tamaÃ±o de entidad de secciÃ³n cambiado para %sse descarta el tipo de secciÃ³n cambiado para %sse descarta el delimitador '-rename-section' ':' extrase descarta el valor de relleno en la secciÃ³n absolutase descarta el tipo de secciÃ³n incorrecto para %sse descarta la especificaciÃ³n '-rename-section' invÃ¡lida: %sse descarta la salida de macro fuera de una definiciÃ³n de macro.se descartan los operandos: %s se descarta la redefiniciÃ³n del alias de registro '%s'se descarta el tipo .endian `%s' que no se reconoceiif convierte a pcrel/binario internoiif convierte a pcrel/puntero internotamaÃ±o de %sreubicaciÃ³n ilegal: %ddirectiva .stab%c ilegal, carÃ¡cter errÃ³neoexpresiÃ³n .stabx ilegal; se asume cerodoble indirecciÃ³n ilegalexpresiÃ³n ilegaloperando de registro inmediato ilegal %sreferencia indirecta ilegalliteral ilegalcÃ³digo de operaciÃ³n %s ilegal para el mcu %soperando ilegaloperando ilegal - se encontrÃ³ un nombre de registro donde no se esperaba ningunooperandos ilegalesrango ilegal de versiones de hardware objetivoregistro ilegal despuÃ©s de @registro ilegal despuÃ©s de @-se incluyÃ³ un registro ilegal en la listanÃºmero de registro ilegalse incluyÃ³ un recurso ilegal en el agregadoimm5 debe ser >= 2el inmediato 0 no se puede usar aquÃse esperaba un inmediato 1 o 2la expresiÃ³n inmediata requiere un prefijo #el inmediato tiene bits definidos fuera del tamaÃ±o del operandoel inmediato no es una potencia de dosel inmediato debe ser 1 o 2el desplazamiento inmediato no estÃ¡ alineado a 2 bytesel desplazamiento inmediato no estÃ¡ alineado a 4 bytesel desplazamiento inmediato estÃ¡ fuera de rangooperando inmediato ilegal con salto absolutoel operando inmediato no es matchel operando inmediato es demasiado grandeel operando inmediato requiere iWMMXt2la suma de los operandos inmediatos es mayor a 32inmediato fuera de rangoinmediato fuera de rango para insertinmediato fuera de rango para la operaciÃ³n de estrechamientoinmediato fuera de rango para shiftel valor inmediato estÃ¡ fuera de rangovalor inmediato fuera de rangovalor inmediato fuera de rango, se esperaba el rango [0, 16]valor inmediato fuera de rango, se esperaba el rango [1, 32]nÃºmero impropio de operandos. se esperaban %d, se obtuvieron %dargumentos inapropiados para el cÃ³digo de operaciÃ³n `%s'opciÃ³n incompatible %i en la directriz de lÃneatipos inconsistentes en la instrucciÃ³n NeoncondiciÃ³n incorrecta en el bloque ITformato incorrecto para la instrucciÃ³n paralela multiplynÃºmero de operandos dados incorrecto en la primera instrucciÃ³nnÃºmero de operandos dados incorrecto en la segunda instrucciÃ³nse utilizÃ³ el registro incorrecto `%s%s' con el sufijo `%c'registro incorrecto en la lista de registrosnÃºmero de registro incorrecto, se descartadesplazamiento de Ãndice fuera de rangoel registro Ãndice sobreescribe el registro de transferenciase especificÃ³ el registro Ãndice pero es cero%s indirecto sin `*'fallÃ³ la inserciÃ³n de "%s" en la tabla de dispersiÃ³n de alias %s: %sfallÃ³ la inserciÃ³n de "%s" en la tabla de dispersiÃ³n de nombres %s: %sse inserta "%s" en la tabla de de dispersiÃ³n de cadenas: %sfallÃ³ la inserciÃ³n de "%s" en la tabla de sÃmbolos: %sse inserta "%s" en la tabla de de dispersiÃ³n de marcas: %slas insns no se pueden combinar con insns de procesamiento paralelolas insns no se pueden combinar con las que no son nopxlas insns no se pueden combinar con las que no son nopyla insn no se pueden combinar con pmulsla instrucciÃ³n %s no puede estar a continuaciÃ³n de otra instrucciÃ³n E/S.la instrucciÃ³n %s no puede estar a continuaciÃ³n de otra instrucciÃ³n de acceso a memoria.La instrucciÃ³n %s requiere de %d operando(s)la instrucciÃ³n '%.*s' no puede ser predicadola instrucciÃ³n '%s' no se puede ejecutar en paralelo.la instrucciÃ³n '%s' sÃ³lo es para el M32R2la instrucciÃ³n '%s' sÃ³lo es para el M32RXla direcciÃ³n de la instrucciÃ³n no es un mÃºltiplo de 16la direcciÃ³n de la instrucciÃ³n no es un mÃºltiplo de 2la direcciÃ³n de la instrucciÃ³n no es un mÃºltiplo de 4la direcciÃ³n de la instrucciÃ³n no es un mÃºltiplo de 8la instrucciÃ³n no puede ser condicionalla instrucciÃ³n no acepta el direccionamiento preindizadola instrucciÃ³n no acepta el Ãndice de registro escaladola instrucciÃ³n no acepta este modo de direccionamientola instrucciÃ³n no acepta el direccionamiento sin indizarla instrucciÃ³n no permite un Ãndice desplazadola instrucciÃ³n no admite el direccionamiento sin indizarla instrucciÃ³n no admite escritura hacia atrÃ¡sla instrucciÃ³n accede implÃcitamente a R31 de la carga previa.la instrucciÃ³n es siempre incondicionalno se permite la instrucciÃ³n en el bloque ITno se permite la instrucciÃ³n: %sla instrucciÃ³n no se admite en modo Thumb16La instrucciÃ³n requiere una etiquetala instrucciÃ³n requiere una etiqueta o valor en el rango -511:512la instrucciÃ³n requiere una etiqueta sin '$'la instrucciÃ³n requiere un Ãndice de registrola secuencia de instrucciÃ³n (write a0, branch, retw) puede activar errores de hardwarelas instrucciones escriben al mismo registro de destino.operando entero fuera de rangoError interno, lÃnea %d, %serror Interno: No se puede dispersar %s: %sconfusiÃ³n interna: reubicaciÃ³n en una secciÃ³n sin contenidoerror interno: cÃ³digo de operaciÃ³n mips16 errÃ³neo: %s %s error interno: no se puede exportar el tipo de reubicaciÃ³n %d (`%s')error interno: no se puede dispersar `%s': %s error interno: no se puede dispersar la macro `%s': %serror interno: no se puede dispersar el cÃ³digo de operaciÃ³n `%s': %serror interno: no se puede instalar la compostura para el tipo de reubicaciÃ³n %d (`%s')error interno: la compostura no estÃ¡ contenida en un fragmentoerror interno: fallaron los operandos lookup/geterror interno: se pierde el cÃ³digo de operaciÃ³n: `%s' "%s" error interno: el formato del fichero objeto no admite la reubicaciÃ³n %d (`%s')error interno: formato dwarf2 desconocidoerror interno: nombre de opciÃ³n '%s' desconocidoerror interno; no se puede generar la reubicaciÃ³n `%s'Â¿Error interno? no se puede generar la reubicaciÃ³n `%s'Â¿Error interno? no se puede generar la reubicaciÃ³n `%s' (%d, %d)falla interna en parse_register_listinconsistencia interna en %s: bdap.w sin algÃºn sÃmboloinconsistencia interna en %s: bdapq no es un sÃmboloproblema de inconsistencia interna en %s: %lxproblema de inconsistencia interna en %s: ext. insn %04lxproblema de inconsistencia interna en %s: fr_subtype %dproblema de inconsistencia interna en %s: fr_symbol %lxproblema de inconsistencia interna en %s: insn %04lxproblema de inconsistencia interna en %s: sÃmbolo resueltoproblema de inconsistencia interna: se llamÃ³ %s por %d bytesreubicaciÃ³n interna (tipo: IMMEDIATE) no compuestainterno: BFD_RELOC_MMIX_BASE_PLUS_OFFSET no resuelve a la secciÃ³ninterno: la expresiÃ³n GREG no resuelve a la secciÃ³ninterno: cÃ³digo de operaciÃ³n mips errÃ³neo (bits 0x%lx indefinidos): %s %sinterno: cÃ³digo de operaciÃ³n mips errÃ³neo (error de mÃ¡scara): %s %sinterno: cÃ³digo de operaciÃ³n mips errÃ³neo (tipo de operando de extensiÃ³n `+%c' desconocido): %s %sinterno: cÃ³digo de operaciÃ³n mips errÃ³neo (tipo de operando `%c' desconocido): %s %sinterno: no se puede dispersar `%s': %sinterno: hay un mmix_prefix_name pero es un prefijo vacÃointerno: tipo de relajaciÃ³n inesperado %d:%dinterno: etiqueta %s sin manejarreubicaciÃ³n_interna (tipo OFFSET_IMM) no compuestael vector de interrupciÃ³n para la instrucciÃ³n trap estÃ¡ fuera de rangoopciÃ³n -march= invÃ¡lida: `%s'opciÃ³n -mavxscalar= invÃ¡lida: `%s'opciÃ³n -mmnemonic= invÃ¡lida: `%s'opciÃ³n -msse-check= invÃ¡lida: `%s'opciÃ³n -msyntax= invÃ¡lida: `%s'opciÃ³n -mtune= invÃ¡lida: `%s'arquitectura en --march= invÃ¡lida: %svalor de @slotcount invÃ¡lidoexpresiÃ³n BSPEC invÃ¡lidaexpresiÃ³n inmediata FPA invÃ¡lidaregistro Hi invÃ¡lido con el inmediatoexpresiÃ³n LOC invÃ¡lidaoperando relativo al PC invÃ¡lidoreferencia PIC invÃ¡lidadirecciÃ³n VSIB invÃ¡lidainterruptor abi -mabi=%s invÃ¡lidoextensiÃ³n de arquitectura invÃ¡lidaarquitectura %s invÃ¡lidaarquitectura invÃ¡lida -A%sarquitectura -xarch=%s invÃ¡lidaarquitectura -z%s invÃ¡lidaopciÃ³n de arquitectura -m%s invÃ¡lida, se descartalista de registros arg invÃ¡lidaargumento '%s' invÃ¡lido para -fdebug-prefix-mapintento invÃ¡lido de declarar un nombre de versiÃ³n externo como valor por defecto en el sÃmbolo `%s'tipo de barrera errÃ³neoregistro base invÃ¡lido para el desplazamiento del registrooperando de ramificaciÃ³n invÃ¡lidodesplazamiento de ramificaciÃ³n byte invÃ¡lidocarÃ¡cter invÃ¡lido %s al inicio del operando %d `%s'caracter invÃ¡lido %s antes del operando %dcarÃ¡cter invÃ¡lido %s en el mnemÃ³nicocarÃ¡cter invÃ¡lido %s en el operando %dcaracteres invÃ¡lidos en la entradacÃ³digo de condiciÃ³n '%s' invÃ¡lidonombre de cÃ³digo de condiciÃ³n invÃ¡lidola opciÃ³n de configuraciÃ³n `%s' es invÃ¡lida en la regla de transiciÃ³n `%s'constante invÃ¡lidaconstante invÃ¡lida (%lx) despuÃ©s de la composturaconstante invÃ¡lida: la expresiÃ³n de %d bit no estÃ¡ en el rango %d..%dconstante invÃ¡lida: la expresiÃ³n de %d bit no estÃ¡ en el rango %u..%uconstante invÃ¡lida: %d no es un entero alineado a wordconstante invÃ¡lida: la expresiÃ³n de 10 bit no estÃ¡ en el rango [-2^9, 2^9-1]constante invÃ¡lida: la expresiÃ³n de 20 bit no estÃ¡ en el rango -2^19..2^19constante invÃ¡lida: la expresiÃ³n de 25 bit no estÃ¡ en el rango [-16777216, 16777215]constante invÃ¡lida: la expresiÃ³n de 32 bit no estÃ¡ en el rango [-0x80000000, 0x7fffffff]constante invÃ¡lida: la expresiÃ³n de 32 bit no estÃ¡ en el rango [0, 0xffffffff]constante invÃ¡lida: la expresiÃ³n de 32 bit no estÃ¡ alineada a wordconstante invÃ¡lida: la expresiÃ³n de bit no estÃ¡ definidanombre de registro de control invÃ¡lidotamaÃ±o de desubicaciÃ³n por defecto "%s" invÃ¡lido. Se cambia a %d por defecto.ciclo vacÃo invÃ¡lidotipo de evaluaciÃ³n de expresiÃ³n %d invÃ¡lidoexpresiÃ³n invÃ¡lida para el operando %i en '%s'expresiÃ³n invÃ¡lida en load/store mÃºltiplesexpresiÃ³n invÃ¡lida en el operandoopciÃ³n '%s' invÃ¡lidapar de registro de coma flotante invÃ¡lido. Los operandos de pares de registro fp vÃ¡lidos son 0, 1, 4, 5, 8, 9, 12 o 13.tamaÃ±o de marco invÃ¡lidoexpresiÃ³n hvc invÃ¡lidaidentificador invÃ¡lido para ".ifdef"identificador invÃ¡lido para ".option"inmediato invÃ¡lidoposiciÃ³n de campo inmediato invÃ¡lidainmediato invÃ¡lido para el cÃ¡lculo de la direcciÃ³n (valor = 0x%08lX)inmediato invÃ¡lido para el cÃ¡lculo de la direcciÃ³n de la pilatamaÃ±o inmediato invÃ¡lidoinmediato invÃ¡lido: %ld estÃ¡ fuera de rangoregistro Ãndice invÃ¡lidotamaÃ±o de Ãndice invÃ¡lido para coldfiretamaÃ±o de registro indirecto invÃ¡lidoinstrucciÃ³n invÃ¡lida para esta arquitectura; necesita instrucciÃ³n shape invÃ¡lidatamaÃ±o de instrucciÃ³n seleccionado invÃ¡lido (%d)sufijo de instrucciÃ³n invÃ¡lidoinstrucciÃ³n last invÃ¡lida para un ciclo con adelanto cerolongitud invÃ¡lida para la directiva .scommopciÃ³n de listado `%c' invÃ¡lidaconstante literal invÃ¡lida: el conjunto necesita estar mÃ¡s cercalrlive '%lu' invÃ¡lidomÃ¡quina `%s' invÃ¡lidatamaÃ±o de entidad de mezcla invÃ¡lidomodo invÃ¡lidoregistro de direcciÃ³n movx invÃ¡lidoregistro dsp movx invÃ¡lidoregistro de direcciÃ³n movy invÃ¡lidoregistro dsp movy invÃ¡lidosufijo neÃ³n invÃ¡lido para la instrucciÃ³n que no es neonnÃºmero invÃ¡lidoexpresiÃ³n de desplazamiento invÃ¡lidadesplazamiento invÃ¡lido, el objetivo no estÃ¡ alineado a word (0x%08lX)desplazamiento invÃ¡lido, valor demasiado grande (0x%08lX)cÃ³digo de operaciÃ³n invÃ¡lidocÃ³digo de operaciÃ³n '%s' invÃ¡lido en la regla de transiciÃ³n '%s'cÃ³digo de operaciÃ³n invÃ¡lido, "%s".operando invÃ¡lidooperando invÃ¡lido (secciÃ³n %s) para `%s'operando invÃ¡lido (secciÃ³n %s) para `%s' al establecer `%s'operando invÃ¡lido en ldmoperando invÃ¡lido en stmmodo de operando invÃ¡lido para esta arquitectura; necesita 68020 o superioroperando invÃ¡lido de ()+operando invÃ¡lido de -()operando invÃ¡lido de S^#se solicitÃ³ un tamaÃ±o de operando invÃ¡lidosufijo de operando invÃ¡lidooperando invÃ¡lido para la directiva .code (%d) (se esperaba 16 o 32)operando invÃ¡lido para el cÃ³digo de operaciÃ³n %s: `%s'operando invÃ¡lido, no es un valor de 10-bit con signo: %doperando invÃ¡lido, no es un valor de 11-bit con signo: %doperando invÃ¡lido, no es un valor de 12-bit con signo: %doperando invÃ¡lido, no es un valor de 13-bit con signo: %doperando invÃ¡lido, no es un valor de 16-bit con signo: %doperando invÃ¡lido, no es un valor de 16-bit sin signo: %doperando invÃ¡lido, no es un valor de 5-bit sin signo: %doperando invÃ¡lido, no es un valor de 6-bit con signo: %doperando invÃ¡lido, no es un valor de 6-bit sin signo: %doperando invÃ¡lido, no es un mÃºltiplo de 32: %doperando invÃ¡lido, no es un mÃºltiplo de 4: %doperando invÃ¡lido, no es un mÃºltiplo de 8: %doperando invÃ¡lido, no es un valor par: %doperando invÃ¡lido: expresiÃ³n en el objetivo PToperandos invÃ¡lidosoperandos invÃ¡lidos (secciones %s y %s) para `%s'operandos invÃ¡lidos (secciones %s y %s) para `%s' al establecer `%s'operandos invÃ¡lidos para el cÃ³digo de operaciÃ³noperandos invÃ¡lidos para %soperandos invÃ¡lidos para el cÃ³digo de operaciÃ³n %s: `%s'tipo de operador invÃ¡lidocodificaciÃ³n invÃ¡lida o no admitida en .cfi_lsdacodificaciÃ³n invÃ¡lida o no admitida en .cfi_personalityprioridad '%lu' invÃ¡lidapseudo operaciÃ³n invÃ¡lidaregistro invÃ¡lido '%s' para la instrucciÃ³n '%s'registro invÃ¡lido en la expresiÃ³n &lista de registros invÃ¡lidalista de registros invÃ¡lida para la instrucciÃ³n push/popmÃ¡scara de registro invÃ¡lidanombre de registro invÃ¡lidonÃºmero de registro invÃ¡lido (%ld) para '%s'nÃºmero de registro (%ld) invÃ¡lido para la instrucciÃ³n `%s'nÃºmero de registro invÃ¡lido: %d no estÃ¡ en [r0--r7]registro invÃ¡lido: r15 ilegalresultado de fragmento de relajaciÃ³n invÃ¡lidoexpresiÃ³n de reubicaciÃ³n invÃ¡lidareubicaciÃ³n invÃ¡lidareubicaciÃ³n invÃ¡lida para la instrucciÃ³n '%s'reubicaciÃ³n invÃ¡lida para el camporeubicaciÃ³n invÃ¡lida para la instrucciÃ³nreubicaciÃ³n invÃ¡lida para el operando %d de '%s'reubicaciÃ³n invÃ¡lida para el operando %i de '%s'reubicaciÃ³n invÃ¡lida en la ranura de instrucciÃ³n %irotaciÃ³n invÃ¡lidafactor de escala invÃ¡lidosegmento "%s" invÃ¡lidodesplazamiento invÃ¡lidovalor de desplazamiento invÃ¡lido: %ldforma short invÃ¡lida del operando inmediato de coma flotanteexpresiÃ³n smc invÃ¡lidalista de registros static invÃ¡lidasubcÃ³digo de operaciÃ³n %d invÃ¡lidosufijo invÃ¡lido despuÃ©s del registro.clase de sufijo invÃ¡lidaexpresiÃ³n swi invÃ¡lidainterruptor -m%s invÃ¡lidooperando simbÃ³lico invÃ¡lidoclase de sintaxis invÃ¡lidasintaxis invÃ¡lida para la directiva .dnsintaxis invÃ¡lida para la directiva .qnsintaxis invÃ¡lida para la directiva .req.sintaxis invÃ¡lida para la directiva .unreqnombre de registro de sistema invÃ¡lidoversiÃ³n de hardware objetivo invÃ¡lidovalor de operando no extendido invÃ¡lidocÃ³digo de operaciÃ³n de desenredo invÃ¡lidouso invÃ¡lid de la reubicaciÃ³n %suso invÃ¡lido del operador "%s"valor invÃ¡lido para el registro de propÃ³sito especialel valor is_stmt no es 0 Ã³ 1nÃºmero isa menor que unojump no estÃ¡ a 3..10 bytes (es %d)objetivo de salto fuera de rangosalto a una direcciÃ³n mal alineada (0x%lx)`%s' basura despuÃ©s de la expresiÃ³n`%s' basura despuÃ©s del registrobasura despuÃ©s del operando %u de '%.*s'basura al final de la lÃnea; el primer carÃ¡cter descartado es `%c'basura al final de la lÃnea; el primer carÃ¡cter descartado tiene valor 0x%xbasura al final de la lÃnea: `%s'Se usa la para cargar registros de 64-bitse redefiniÃ³ la etiqueta "$%d"se redefiniÃ³ la etiqueta "%d$"la etiqueta %s no se definiÃ³ en esta secciÃ³n dwarfetiqueta despuÃ©s de '||'etiqueta despuÃ©s del predicadola etiqueta no estÃ¡ al inicio del paquete de ejecuciÃ³nlas etiquetas no son vÃ¡lidas dentro de una agrupaciÃ³nfalta la etiquetafalta la etiqueta el Ãºltimo registro debe ser r7ldr al registro 15 debe ser alineado a 4-bytesldrd/strd requiere un par de registros par:imparel operando izquierdo es un nÃºmero grande; se asume el entero 0el operando izquierdo es un nÃºmero de coma flotante; se asume el entero 0no se necesita la longitudla longitud del sÃmbolo "%s" ya es %ld; se descarta %dla etiqueta li rd no es la forma correcta de instrucciÃ³nlÃnea %d: rep o repi debe incluir por lo menos 4 instruccioneslÃnea %d: no se puede colocar la direcciÃ³n del sÃmbolo '%s' en un bytelÃnea %d: no se puede colocar la direcciÃ³n del sÃmbolo '%s' en un quadlÃnea %d: no se puede colocar la direcciÃ³n del sÃmbolo '%s' en un shortlÃnea %d: no se puede colocar el valor %lx en un bytelÃnea %d: no se puede colocar el valor %lx en un shortlÃnea %d: tipo de reubicaciÃ³n desconocida: 0x%xel nÃºmero de lÃnea (%d) para la directiva .stab%c no cabe en el campo de Ãndice (20 bits)los nÃºmeros de lÃnea deben ser positivos; se rechazÃ³ el nÃºmero de lÃnea %d.fallÃ³ la inserciÃ³n en el conjunto de literalesse requiere la ubicaciÃ³n del conjunto de literales para text-section-literals; especifique con .literal_positiondesbordamiento en el conjunto de literalesse referencÃa una literal a travÃ©s de un lÃmite de secciÃ³nLos modos de direccionamiento lk son invÃ¡lidos para el direccionamiento de registros mapeados en memoriaLa pseudo instrucciÃ³n lmi no se puede usar en un etiqueta en el campo immse requiere el registro lose utilizÃ³ una reubicaciÃ³n lo() en una instrucciÃ³n que no la admitese carga el mismo registro en la operaciÃ³n paralelala etiqueta local `%s' no estÃ¡ definidase requiere un salto largoun ciclo que contiene menos de tres instrucciones puede activar errores de hardwareel final de un ciclo demasiado cerca a otro final de ciclo puede activar errores de hardwareel objetivo del ciclo no sigue la instrucciÃ³n loop en la secciÃ³nciclo demasiado largo para la instrucciÃ³n LOOPse esperaba un register(r0-r15) low, no '%.100s'se descartan los 16 bits inferiores de la mÃ¡scaraLa expresiÃ³n lui (%lu) no estÃ¡ en el rango 0..65535se seleccionaron caracterÃsticas tanto de m68k como de cfla macro requiere el registro $at mientras noat estÃ¡ en efectola macro requiere $at mientras $at estÃ¡ en usomacros anidadas con demasiada profundidadel cÃ³digo de operaciÃ³n major no estÃ¡ ordenado para %slista de registros malformada en push/popla mÃ¡scara recorta bits del cÃ³digo de operaciÃ³n para %smd_apply_fix: r_type 0x%x desconocido md_estimate_size_before_relax destinaciones ramificadas desalineadasdatos desalineadosdesplazamiento desalineadono hay coincidencia entre el tamaÃ±o del cÃ³digo de operaciÃ³n y el tamaÃ±o del operandono hay coincidencia entre el registro y el sufijo.eb sin coincidencialos tipos de elementos/estructura no coinciden en la listaparÃ©ntesis sin coincidencia.procend mal colocadooperando PIC mal colocadofalta un '%c'falta un ')'falta un ')' en %%-opfalta un ']'falta un +falta un .endfalta un .end al final del ensambladofalta un .end o un .bend al final del ficherofalta un .endp antes de .cfi_startprocfalta .fnstart antes de la directiva unwindingfalta un .funcfalta un .procfalta un =faltan las opciones CPSfalta un [falta un ]falta un `)'falta `)' despuÃ©s de los formales en la definiciÃ³n de macro `%s'falta un `.end'falta un `}'falta la alineaciÃ³nfalta la extensiÃ³n de la arquitecturafalta el nombre de arquitectura `%s'falta el argumentofalta una argumento para la directiva sse_checkfalta el separador de argumentos ',' para .cpsetupfalta la clasefalta la comilla que cierra; (se asume)falta un `%c' que cierrafalta una llave que cierrafalta un parÃ©ntesis que cierrafalta una comafalta una coma despuÃ©s de la constante insn falta una coma despuÃ©s del nombre del segmentofalta una coma o punto y comafalta el cÃ³digo de condiciÃ³n en la directiva de control estructuradafalta la arquitectura de cpufalta el nombre de cpu `%s'falta un dofalta el nombre del modo de emulaciÃ³nfalta una comilla finalfalta una expresiÃ³nfalta una expresiÃ³n en la directiva .sizefalta el tamaÃ±o del marcofalta una etiquetafalta una expresiÃ³n localfalta el parÃ¡metro modelofalta un nombrefalta el cÃ³digo de operaciÃ³nfalta un operandofalta un operando despuÃ©s de la comafalta un operando; se asume ceroexpresiÃ³n de desplazamiento faltante o errÃ³neaexpresiÃ³n de desubicaciÃ³n faltante o invÃ¡lida `%s'la expresiÃ³n de desubicaciÃ³n faltante o invÃ¡lida `%s' se toma como 0expresiÃ³n faltante o invÃ¡lida `%s'expresiÃ³n inmediata faltante o invÃ¡lida `%s'falta el nombre del sÃmbolo realfalta el tipo de reubicaciÃ³nfalta la cadena para renombrarfalta el campo rotation despuÃ©s de la comafalta el identificador de atributo de secciÃ³nfalta el nombre de secciÃ³nfalta el nombre de tipo de secciÃ³nfalta el nombre del segmentofalta el separadorfalta el tamaÃ±ofalta una expresiÃ³n de tamaÃ±ofalta una expresiÃ³n sizeof_stubfalta una cadenafalta el nombre del sÃmbolofalta un thenfalta un to o downtofalta el tipofalta el valorfalta el nombre de versiÃ³n en `%s' para el sÃmbolo `%s'mÃ¡s de 65K de conjuntos literalesmÃ¡s de un tamaÃ±o de marco en la lista'||' mÃºltiples en la misma lÃneamÃºltiples ramificaciones o saltos en el mismo agregadoespecificaciones mÃºltiples de condiciÃ³nse especificaron mÃºltiples nombres de emulaciÃ³nse especificaron mÃºltiples formatos para un agregado; se usa '%s'literales mÃºltiples en la expansiÃ³nespecificaciones movx mÃºltiplesespecificaciones movy mÃºltiplesespecificaciones mÃºltiples de procesamiento paralelopredicados mÃºltiples en la misma lÃneasecciones mÃºltiples remapeadas a la secciÃ³n de salida %sversiones mÃºltiples [`%s'|`%s'] para el sÃmbolo `%s'escrituras mÃºltiples al mismo registrodebe ser @(r0,...)se debe ramificar a una direcciÃ³n que sea mÃºltiplo de 4se deben especificar extensiones para agregar antes de especificar las que se borrarÃ¡nalineaciÃ³n negativadesplazamiento negativonÃºmero de operando %d negativotamaÃ±o negativosubcÃ³digo de operaciÃ³n %d negativolongitud de sÃmbolo negativase descarta el valor negativo en %sbloques .bs anidadosdirectivas .ent anidadasciclo entubado por software anidadolÃnea nueva en el tÃtulose definiÃ³ la secciÃ³n nueva '%s' sin atributos - esto podrÃa causar problemasnext fuera de un loop estructuradono hay reubicaciones de %d bytes disponiblesno hay '(' que coincida con ')'no hay '[' que coincida con ']'no se compilÃ³ el soporte para x86_64 de 32bitno se compilÃ³ el soporte para x86_64no hay un puntero a fichero actualmenteno hay sÃmbolo de entrada para la funciÃ³n global '%s'no hay un nombre de fichero a continuaciÃ³n de la opciÃ³n -tno hay un nombre de fichero a continuaciÃ³n del pseudo-operador .INCLUDEno hay una entrada hppa_fixup para el tipo de compostura 0x%xno se dio un sufijo mnemÃ³nico de instrucciÃ³n y ningÃºn operando de registro; no se puede determinar el tamaÃ±o de la instrucciÃ³nno se dio un sufijo mnemÃ³nico de instrucciÃ³n; no se puede determinar el tamaÃ±o inmediatono hay un fragmento registrado para la literalno hay un nÃºmero de secuencia despuÃ©s de !%sno hay tal modificador de arquitectura: `%s'no hay tal arquitectura: `%s'no hay tal instrucciÃ³n: `%s'no hay un sfr en esta arquitecturano hay una definiciÃ³n GREG adecuada para los operandosno se especificÃ³ una marca para %sno es posible manejar un .file dentro de una secciÃ³n .ent/.endexpresiÃ³n no absoluta en campo constantese utilizÃ³ un valor no absoluto con .space/.besla cuenta de byte no es constanteexpresiÃ³n no constante en la declaraciÃ³n ".elseif"expresiÃ³n no constante en la declaraciÃ³n ".if"el rango de registros no es contiguooperando OPF que no es inmediato, se descartareubicaciÃ³n no relativa a pc para el campo relativo a pcno hay una instrucciÃ³n 16 bit '%s'no hay suficientes operandos (%d) para '%s'; se esperaban %dno se usa ningÃºn registro baseel nÃºmero debe ser positivo y menor que %dnÃºmero de elementos literales != 1no coincide el nÃºmero de operandosel nÃºmero de registros debe estar en el rango [1:4]operando de direccÃ³n impar: %lddesubicaciÃ³n impar en %xdistancia de ramificaciÃ³n impar (0x%lx bytes)no se puede usar aquÃ un nÃºmero imparnÃºmero impar de bytes en la descripciÃ³n del operandose especificaron registros de propÃ³sito general numerados impares como par de registrono se puede usar aquÃ un registro imparel desplazamiento en el operando %u de '%.*s' no es divisible por %uel desplazamiento en el operando %u de '%.*s' estÃ¡ fuera de rangoel desplazamiento debe ser cero en codificaciÃ³n ARMel desplazamiento no es un mÃºltiplo de 4desplazamiento fuera de rangodesplazamiento a destino desalineadodesplazamiento demasiado grandesÃ³lo se pueden indizar los registros Dsolamente se permite el desplazamiento LSL en modo thumbsÃ³lo se permiten SUBS PC, LR, #constsÃ³lo se permite una expresiÃ³n constantesÃ³lo se admiten los desplazamientos constantes en la secciÃ³n absolutasÃ³lo se permiten registros lo con inmediatossÃ³lo se usan los 16 bits inferiores del primer operandosÃ³lo se debe especificar un tipo para el operandosÃ³lo se permite r15 aquÃsÃ³lo se admite con gcc antiguosolamente se permiten dos registros SP VFP consecutivos aquÃcÃ³digo de operaciÃ³n %s: no se puede decodificar el operando '%s' en '%s'cÃ³digo de operaciÃ³n %s: no se identifica el operando '%s' en '%s'cÃ³digo de operaciÃ³n '%s': no se puede encontrar la definiciÃ³n literalcÃ³digo de operaciÃ³n '%s': no hay un nombre de operaciÃ³n '%s' enlazado para la precondiciÃ³n en %scÃ³digo de operaciÃ³n '%s': no hay un nombre de operaciÃ³n '%s' enlazado para la precondiciÃ³n en '%s'cÃ³digo de operaciÃ³n '%s': la precondiciÃ³n sÃ³lo contiene constantes en '%s'cÃ³digo de operaciÃ³n '%s': el reemplazo no tiene %d operadoresel cÃ³digo de operaciÃ³n 'NOP.N' no estÃ¡ disponible en esta configuraciÃ³ncÃ³digo de operaciÃ³n 0x3 y SINTAX_3OP invÃ¡lidosno se admite el cÃ³digo de operaciÃ³n `%s' para el objetivo %sel cÃ³digo de operaciÃ³n no tiene efectono se admite el cÃ³digo de operaciÃ³n en este procesador: %sno se admite el cÃ³digo de operaciÃ³n en este procesador: %s (%s)el cÃ³digo de operaciÃ³n no es vÃ¡lido para esta variante de cpuse usÃ³ la reubicaciÃ³n %s especÃfica de cÃ³digo de operaciÃ³n fuera de una instrucciÃ³nambos cÃ³digos de operaciÃ³n '%s' (ranura %d) y '%s' (ranura %d) tienen acceso de puerto volatilelos cÃ³digos de operaciÃ³n '%s' (ranura %d) y '%s' (ranura %d) escriben en el mismo puertolos cÃ³digos de operaciÃ³n '%s' (ranura %d) y '%s' (ranura %d) escriben en el mismo registrolos cÃ³digos de operaciÃ³n '%s' (ranura %d) y '%s' (ranura %d) escriben en el mismo estadoun CFI abierto al final del fichero; falta una directiva .cfi_endprocoperandoel operando %d de '%s' tiene el valor invÃ¡lido '%u'el operando %d de '%s' tiene el valor fuera de rango '%u'el operando %d sobreescribe en %soperando %d: expresiÃ³n de uso ilegal: `%s`operando %s0x%lx fuera de rango.el operando %u de '%.*s' es de sÃ³lo lecturael operando %u de '%.*s' es de sÃ³lo escriturael operando %u de '%.*s' no es un registro de direcciÃ³n base vÃ¡lidoel operando %u de '%.*s' no es una referencia de memoria vÃ¡lidael operando %u de '%.*s' no es un registro de direcciÃ³n de devoluciÃ³n vÃ¡lidoel operando %u de '%.*s' no es una constanteel operando %u de '%.*s' estÃ¡ en el lado equivocadoel operando %u de '%.*s' estÃ¡ fuera de rangoel operando 0 debe ser FPSCRel operando 1 debe ser FPSCRerror de Ãndice de operando para %sel operando no es una constante absolutael operando no es un inmediatodesbordamiento de mÃ¡scara de operandoel operando debe ser una constanteel operando debe ser una constante o una etiquetael operando debe ser un mÃºltiplo de 2el operando debe ser un mÃºltiplo de 4el operando debe ser un absoluto en el rango %d..%d, no %del operando debe ser un absoluto en el rango %u..%u, no %ldel operando no es un mÃºltiplo de 4 para PT, PTA o PTB: %dno coincide el nÃºmero de operandosoperando fuera de rangooperando fuera de rango (%d no estÃ¡ entre %d y %d)operando fuera de rango (%s no estÃ¡ entre %ld y %ld)operando fuera de rango para PT, PTA y PTBel operando estÃ¡ fuera de rango, se expande la instrucciÃ³noperando fuera de rango: %ldoperando fuera de rango: %ludesbordamiento de operandoel operando se refiere a R%ld de la instrucciÃ³n anterior a la previa.el operando se refiere a R%ld de la instrucciÃ³n previa.el operando se refiere a R%ld de la carga previa.no coincide el tamaÃ±o del operandoel tamaÃ±o del operando se debe especificar para el inmediato VMOVel tamaÃ±o del operador debe coincidir con la anchura del registrono coincide el tipo de operandono se pueden inferir los tipos de operandoel valor del operando estÃ¡ fuera de rango para la instrucciÃ³nno coinciden los operandos/tamaÃ±oslos operandos 0 y 1 debe ser el mismo registrolos operandos para el cÃ³digo de operaciÃ³n `%s' no coincide con ningÃºn formato vÃ¡lidono coinciden los operandoslos operandos no son reducibles en el momento del ensambladola operaciÃ³n combina sÃmbolos en segmentos diferentesla opciÃ³n --link-relax solamente se admite en el formato b.outla opciÃ³n `%s' podrÃa no estar negadano se reconoce la opciÃ³n `%s'la opciÃ³n `-%c%s' es obsoleta: %sla opciÃ³n `-A%s' es obsoleta: use `-%s'o superiormemoria agotadafuera de rangodesbordamientodesbordamiento en la ramificaciÃ³n a %s; se convirtiÃ³ en una secuencia de instrucciones mÃ¡s largadesbordamiento en la tabla (.lit8) literaldesbordamiento en la tabla (.lita) literalNo se admite p2align en este objetivoconflicto de empaquetado: %s debe despachar secuencialmentese agregÃ³ rellenoparalelola instrucciÃ³n paralela no estÃ¡ a continuaciÃ³n de otra instrucciÃ³nse descartan los parÃ©ntesiserror de decodificaciÃ³nse descarta la lÃnea parcial al final del ficheroel pc no se puede usar con escritura hacia atrÃ¡srelativa a pcrelativo a pc error de instrucciÃ³n pce (16 bit || 16 bit)'el pcrel para la ramificaciÃ³n a %s estÃ¡ demasiado lejos (0x%lx)el pcrel para la ramificaciÃ³n a %s estÃ¡ demasiado lejos (0x%x)el pcrel para loopt estÃ¡ demasiado lejos (0x%lx)el pcrel para lrw/jmpi/jsri a %s estÃ¡ demasiado lejos (0x%lx)no se permite la reubicaciÃ³n de pcrel en una instrucciÃ³npcrel demasiado lejospcrel demasiado lejos de BFD_RELOC_BFIN_10pcrel demasiado lejos de BFD_RELOC_BFIN_11_PCRELpcrel demasiado lejos de BFD_RELOC_BFIN_12pcrel demasiado lejos de BFD_RELOC_BFIN_24pcrel demasiado lejos de BFD_RELOC_BFIN_5pcrel demasiado lejos de BFD_RELOC_MOXIE_10se requiriÃ³ una rutina personality antes de la directiva .handlerdatase especificÃ³ una rutina personality para el marco cantunwindse requiere un registro puntero (X, Y o Z)se requiere un registro puntero (Y o Z)se requiere el registro puntero Zlos polimÃ³rficos no estÃ¡n activados. Use la opciÃ³n -mP para activarlos.el post-Ãndice debe ser un registrose usÃ³ una expresiÃ³n post-indizada en la instrucciÃ³n de precargano se admite el postincrementopowerpc_operands[%d] duplica a powerpc_operands[%d]powerpc_operands[%d].bitm invÃ¡lidose esperaba una expresiÃ³n pre-indizadael predicado no estÃ¡ seguido por una instrucciÃ³nla predicaciÃ³n en A0 no se admite en esta arquitecturaprefer-const16 tiene conflictos con prefer-l32rprefer-l32r tiene conflictos con prefer-const16un .ent previo no estÃ¡ cerrado por un .endla entrada CFI previa no estÃ¡ cerrada (falta un .cfi_endproc)el movx previo requiere nopyel movy previo requiere nopxÂ¿anÃ¡lisis de perfil en la secciÃ³n absoluta?pseudo-operaciÃ³n ilegal dentro de .struct/.unionpush/pop no admiten {reglist}^el predicado calificador no estÃ¡ seguido por una instrucciÃ³nno se permite r13 aquÃno se permite r14 como primer registro cuando se omite el segundo registrono se permite r14 aquÃno se permite el almacenamiento basado en r15no se permite r15 aquÃno se debe usar r2 en el modo de direccionamiento indizadord debe ser un nÃºmero par.rdhi y rdlo deben ser diferentesrdhi, rdlo y rm deben ser todos diferentescÃ³digo reentranteel tipo de registro no es vÃ¡lidotipo_de_registro_no_validoun sÃmbolo redefinido no se puede usar en la reubicaciÃ³nredefiniciÃ³n del registro globalredefiniciÃ³n del tipo de mcu %s' a %s'redefiniciÃ³n del tipo de mcu `%s' a `%s'prefijo %s redundantereg debe ser <= 31se esperaba registro-registrose esperaba un registrose esperaba un registro, pero se vio '%.6s'se esperaba un registro, no '%.100s'el registro estÃ¡ fuera de ordenel registro tiene el tamaÃ±o errÃ³neo para un word %sel registro tiene el tamaÃ±o errÃ³neo para la direcciÃ³n %sla lista de registros debe contener por lo menos 1 y cuando mucho 16 registrosla lista de registros no estÃ¡ en orden ascendenteel registro debe ser sp o establecido por una directiva previousunwind_movspse requiere un nombre de registro o un nÃºmero del 0 al 31el nÃºmero de registro %u no se admite en esta arquitecturase requiere un nÃºmero de registro superior a 15nÃºmero de registro fuera de rangonÃºmero de registro demasiado grande para push/popse esperaba un operando de registro, pero se recibiÃ³ un escalarregistro fuera de rango en la listala pareja de registros para el operando %u de '%.*s' no es una pareja par/impar vÃ¡lidaregistro r%d fuera de rangoel registro r0 no se puede usar aquÃse requiere los registros r16-r23se requieren los registros r24, r26, r28 o r30el rango de registros no estÃ¡ en orden ascendenteregistro rh%d fuera de rangoregistro rl%d fuera de rangoel registro rq%d no existeregistro rq%d fuera de rangoel registro rr%d no existeregistro rr%d fuera de rangoel registro es el mismo que la base de escritura-hacia-atrÃ¡sel desplazamiento del registro save no es un mÃºltiplo de %ula secciÃ³n de registros tiene contenido el registro estribo debe ser 1 o 2la sintaxis de registro es .register %%g[2367],{#scratch|nombresimbolo|#ignore}no coincide el tipo de registrose usÃ³ un valor de registro como una expresiÃ³nlos registros no pueden ser el mismorel demasiado lejos de BFD_RELOC_16rel demasiado lejos de BFD_RELOC_8desbordamiento de reubicaciÃ³n rel31direcciÃ³n relativa fuera de rangollamada relativa fuera de rangosalto relativo fuera de rangono se admite la relajaciÃ³n el formato del fichero objeto no admite la reubicaciÃ³n %dla reubicaciÃ³n no estÃ¡ dentro (de la parte fija de) la secciÃ³nel campo reubicado y el tipo de reubicaciÃ³n difieren en signola ABI actual no admite la reubicaciÃ³n %sno se admite la reubicaciÃ³nla reubicaciÃ³n no es aplicablereubicaciÃ³n fuera de rangodesbordamiento de reubicaciÃ³nrepeticiÃ³n < 0; se descarta .fillno se dio el desplazamiento requerido en la referencia indirectaconflicto de recurso (A%d)conflicto de recurso (opciÃ³n C)conflicto de recurso (opciÃ³n F)conflicto de recurso (PSW)conflicto de recurso (R%d)se descarta el resto de la lÃnea; el primer carÃ¡cter descartado es `%c'restore sin savedevuelto de mips_ip(%s) insn_opcode = 0x%x el operando derecho es un nÃºmero grande; se asume el entero 0el operando derecho es un nÃºmero de coma flotante; se asume el entero 0no se admite ror #immla rotaciÃ³n sÃ³lo puede ser 0, 8 , 16 o 24se redondea hacia aboajo el primer operando de coma flotante a entero con signose redondea hacia abajo el primer operando de coma flotante a entero sin signorva sin sÃmboloel sufijo s para la instrucciÃ³n de comparaciÃ³n es obsoletoDesbordamiento del desplazamiento del cÃ³digo s3_PIC (mÃ¡x 16 bits con signo)se utilizÃ³ dos veces el mismo tipo de prefijoel Ãndice escalar debe ser constanteÃndice escalar fuera de rangoel escalar debe tener un Ãndiceescalar fuera de rango para la instrucciÃ³n multiplyfactor de escala invÃ¡lido en esta arquitectura; necesita cpu32 o 68020 o superiorfactor de escala de %d sin un registro ÃndiceinstrucciÃ³n score3d.se utilizÃ³ una reubicaciÃ³n sdaoff() en una instrucciÃ³n que no la admitesegundose encontrÃ³ una segunda directiva .ent antes de la directiva .endfalta el segundo operandoel segundo operando debe ser 1el segundo operando de .insn no es una constante el segundo registro debe ser mayor que el primer registroel segundo registro debe estar a continuaciÃ³n de un guiÃ³n en la lista de registrosla secciÃ³n %s se renombrÃ³ varias vecesla secciÃ³n '%s' terminÃ³ con un bloque IT abierto.la secciÃ³n `%s' que tiene como alias a `%s' no se utilizala alineaciÃ³n de la secciÃ³n debe ser >= 4 bytes para revisar la seguridad de MULS/MULUno se admite el cambio de secciÃ³n desde dentro de una pareja BSPEC/ESPEClos sÃmbolos de secciÃ³n ya son globalesfallÃ³ la bÃºsqueda del final del fichero .incbin `%s'la anulaciÃ³n del segmento en `%s' no tiene efectola FPU seleccionada no admite la instrucciÃ³nel procesador seleccionado no tiene todas las caracterÃsticas de la arquitectura seleccionadael procesador seleccionado no admite la forma 'A' de esta instrucciÃ³nel procesador seleccionado no admite el modo ARM `%s'el procesador seleccionado no admite cÃ³digos de operaciÃ³n ARMel procesador seleccionado no admite la extensiÃ³n DSPel procesador seleccionado no admite cÃ³digos de operaciÃ³n THUMBel procesador seleccionado no admite el modo Thumb `%s'el procesador seleccionado no admite el modo Thumb-2 `%s'el procesador seleccionado no admite para el registro de propÃ³sito especial solicitadoformato de objetivo seleccionado '%s' desconocidonÃºmero de secuencia en uso para !tlsgd!%ldnÃºmero de secuencia en uso para !tlsldm!%ldsecuencialset: el nÃºmero no estÃ¡ en el rango -2147483648..4294967295set: el nÃºmero no estÃ¡ en el rango 0..4294967295setsw: el nÃºmero no estÃ¡ en el rango -2147483648..4294967295se establecen atributos de secciÃ³n incorrectos para %sse establece un tipo de secciÃ³n incorrecto para %ssetx: registro temporal ilegal g0setx: el registro temporal es el mismo que el registro destinono se permite desplazar por registro en modo thumbcuenta de desplazamientose esperaba una expresiÃ³n de desplazamientola expresiÃ³n de desplazamiento es demasiado grandeel desplazamiento debe ser constantedesplazamiento fuera de rangono se permite el valor de desplazamiento sobre 3 en modo thumblos desplazamientos en las instrucciones CMP/MOV sÃ³lo se admiten en la sintaxis unificadaramificaciÃ³n short con desplazamiento cero: utilice :wdesignador de atajo invÃ¡lidodebe tener 1 o 2 operandosdebe tener dos operandosdesbordamiento de .word con signo; el interruptor puede ser demasiado grande; %ld en 0x%lxtamaÃ±o (%ld) fuera de rango, se descartael tamaÃ±o no es 4 o 6tamaÃ±o negativo; se descarta .fillla longitud de "%s" ya es %ld; no se cambia a %ldsalto (%ld) o cuenta (%ld) invÃ¡lidos para el tamaÃ±o del fichero (%ld)se saltan los prefijos en esta instrucciÃ³nse salta la instrucciÃ³n de dos wordLa pseudo instrucciÃ³n smi no debe usar una etiqueta en el campo fieldalgunos sÃmbolos sin definir; se asumen cerofuenteel operando de origen debe ser una direcciÃ³n absoluta de 16bitel operando de origen debe ser un registro de 8 bitel registro fuente debe ser r1el registro fuente es el mismo que la base de escritura-hacia-atrÃ¡ssource1 y dest deben ser el mismo registrola asignaciÃ³n de espacio es demasiado compleja en la secciÃ³n absolutala asignaciÃ³n de espacio es demasiado compleja en la secciÃ³n comÃºnconvert_frag de sparc la instrucciÃ³n especial izquierda `%s' mata a la instrucciÃ³n `%s' en el contenedor derechola ubicaciÃ³n especificada no estaba TETRA alineadano se admite el registro spill_mask.convert_frag de spu operandos espurios; (%d operandos/instrucciÃ³n mÃ¡ximo)se desactivÃ³ la instrucciÃ³n st/ld offset 23 .la disposiciÃ³n del marco de pila no coincide con la rutina personalityla disposiciÃ³n del marco de pila es demasiado complejo para el desenredadorel operando de pila debe ser un mÃºltiplo de 4el desplazamiento del puntero de pila es demasiado grande para la rutina personalityprefijo `%s' por sÃ solono se admite la direcciÃ³n de iniciotamaÃ±o de papel extraÃ±o, se establece a sin forma`\' basurano estÃ¡ disponible el estribo de 2 cuando el tamaÃ±o del elemento es 8cadena demasiado grande (%lu bytes)las cadenas se deben colocar en una secciÃ³nse encontrÃ³ un valor de subcÃ³digo cuando el cÃ³digo de operaciÃ³n no es igual a 0x03admite la interoperaciÃ³n ARM/Thumbel uso de swp{b} es obsoleto en esta arquitecturasÃmbolo "%s" sin definir; se asume ceroel sÃmbolo %s estÃ¡ en una secciÃ³n diferenteel sÃmbolo %s es dÃ©bil y se puede sobreescribir despuÃ©sel sÃmbolo '%s' ya estÃ¡ definidoel sÃmbolo `%s' que tiene como alias a `%s' no se utilizael sÃmbolo `%s' ya estÃ¡ definidoel sÃmbolo `%s' no puede ser dÃ©bil y comÃºn al mismo tiempoel sÃmbolo `%s' ya estÃ¡ definidoel sÃmbolo "%s" ya estÃ¡ definido como "%s"/%s%ldsÃmbolo como registro destinose encontrÃ³ un ciclo de definiciÃ³n de sÃmbolo en %sel sÃmbolo en .toc no coincide con ningÃºn .tcel tipo de sÃmbolo "%s" sÃ³lo se admite en objetivos GNUsÃmbolo%dno se admite sÃmbolo+desplazamiento para got tlsno se permite el operando simbÃ³licolos sÃmbolos asignados con .asg deben comenzar con una letralos sÃmbolos asignados con .eval deben comenzar con una letraerror sintÃ¡cticoerror sintÃ¡ctico en .startof. o .sizeof.error sintÃ¡ctico en @(disp,[Rn, gbr, pc])error sintÃ¡ctico en @(r0,...)error sintÃ¡ctico en @(r0...)error sintÃ¡ctico en la directiva de control estructuradaerror sintÃ¡ctico: no es esperaba cÃ³digo de condiciÃ³nerror sintÃ¡ctico: se esperaba `]', se obtuvo `%c'error sintÃ¡ctico: especificador de tabla de contenidos `%s' invÃ¡lidoerror sintÃ¡ctico: no se esperaba un registroerror sintÃ¡ctico: no se esperaba un registro de sistemaerror sintÃ¡ctico: falta el valor antes del nombre de registroerrÃ³r sintÃ¡ctico; ')' no se permite aquÃerror sintÃ¡ctico; fin de lÃnea, se esperaba `%c'error sintÃ¡ctico; se esperaba ,error sintÃ¡ctico; se encontrÃ³ `%c', se esperaba `%c'error sintÃ¡ctico; falta un '(' despuÃ©s de la desubicaciÃ³nerror sintÃ¡ctico; falta un ')' despuÃ©s del registro baselos registros del sistema no se pueden incluir en la listano se encontrÃ³ una marca para .tag %sel objetivo de la instrucciÃ³n %s debe ser una etiquetase utilizÃ³ una reubicaciÃ³n tdaoff() en una instrucciÃ³n que no la admitela etiqueta de texto `%s' estÃ¡ alineada a un lÃmite imparel primer operando de `%s' debe ser `%s%s'el Ãºltimo operando de `%s' debe ser `%s%s'el desplazamiento 0x%08lX no es representablelos Ãºnicos sufijos vÃ¡lidos aquÃ son '(plt)' y '(tlscall)'el tipo de %s es demasiado complejo; se simplificarÃ¡la instrucciÃ³n que produce %s no puede estar en una ranura de retardo.no hay reubicaciones relativas a pc sin signoterceroaÃºn no se admite esta forma DSEste modo de direccionamiento no se puede aplicar al operando destinoeste modo de direccionamiento requiere escritura hacia atrÃ¡s del registro-baseesta reubicaciÃ³n de grupo no se permite en esta instrucciÃ³nesta instrucciÃ³n no admite indizadoesta instrucciÃ³n requiere una direcciÃ³n post-indizadaesta instrucciÃ³n no escribirÃ¡ hacia atrÃ¡s el registro baseesta instrucciÃ³n escribirÃ¡ hacia atrÃ¡s el registro baseesta cadena no puede contener '\0'la instrucciÃ³n condicional thumb debe estar en el bloque ITmuy pocos operandosdemasiados !literal!%ld para %sdemasiadas entradas .dimdemasiadas entradas .sizese asignaron demasiados registros GREG (mÃ¡ximo %d)demasiadas insns IVC2 para empaquetar juntasdemasiadas insns IVC2 para empaquetar con un insn core de 16-bitdemasiadas insns IVC2 para empaquetar con una insn core de 32-bitdemasiados argumentosdemasiadas composturasdemasiadas instrucciones en el paquete de ejecuciÃ³ndemasiadas insns lda para !gpdisp!%lddemasiadas insns ldah para !gpdisp!%lddemasiadas insns lituse para !lituse_tlsgd!%lddemasiadas insns lituse para !lituse_tlsldm!%lddemasiadas referencias a memoria para `%s'demasiados operandosdemasiados operandos (%d) para '%s'; se esperaban %ddemasiados operandos en la instrucciÃ³ndemasiados operandos para '%.*s'demasiados operandos: %sdemasiados argumentos posicionalesdemasiados st_End'sdemasiados sufijosdemasiados cÃ³digos de operaciÃ³n de desenredodemasiados cÃ³digos de operaciÃ³n de desenredo para la rutina personality 0demasiadas instrucciones de desenredose traduce bgeni a movise traduce bmaski a movise traduce mgeni a movise traduce a `%s %s%s'se traduce a `%s %s%s,%s%s'se traduce a `%sp'la excepciÃ³n de trampa no se admite en ISA 1el fichero `%s' estÃ¡ truncado, se leyeron %ld de %ld bytesdos pseudo-operadores .function sin un .ef que intervengaÂ¿tipo %d de reubicaciÃ³n hecha? el especificador de tipo tiene el nÃºmero errÃ³neo de partesse especificaron tipos en el mnemÃ³nico y en los operandosno se pueden calcular las instrucciones ADRL para el desplazamiento de PC de 0x%lxno se puede generar cÃ³digo de operaciÃ³n de desenredo para el desplazamiento de puntero a marcono se puede generar cÃ³digo de operaciÃ³n de desenredo para el registro de puntero a marco %dno se puede genera cÃ³digos de operaciÃ³n de desenredo para el registro %dno se puede localizar el fichero de inclusiÃ³n: %sÂ¿No se puede empaquetar %s por sÃ mismo?no se puede restaurar la direcciÃ³n de devoluciÃ³n para el registro previamente restauradono se puede ensanchar la instrucciÃ³nobjetivo de ramificaciÃ³n sin alinear: %d bytes en 0x%lxno se admiten los datos sin alinear en una ubicaciÃ³n absolutaentrada de instrucciÃ³n sin alinearciclo sin alinear: %d bytes en 0x%lxregistro sin alinearnÃºmero de fichero %ld sin asignarllaves sin balancear en el operando %d.parÃ©ntesis sin balancear en el operando %d.'(' sin cerrarfix que no se puede decodificarinstrucciÃ³n no decodificable en la instrucciÃ³n fragcombinaciÃ³n indefinida de operandosetiqueta local `%s' sin definirsÃmbolo sin definir %s en la reubicaciÃ³n PCRse usa el sÃmbolo sin definir %s como un valor inmediatosÃmbolo sin definir para el cÃ³digo de operaciÃ³n "%s"directiva .cantunwind inesperadadirectiva .handlerdata inesperadadirectiva .unwind_movsp inesperadatipo de reubicaciÃ³n de 12-bit inesperadotipo de reubicaciÃ³n de 18-bit inesperadoreubicaciÃ³n TLS inesperada`"' inesperada en la expresiÃ³nse especificÃ³ un bit inesperado despuÃ©s de APSRcarÃ¡cter inesperado `%c' en el especificador de tipofin de fichero inesperado en irp Ã³ irpcfin de fichero inesperado en la definiciÃ³n de macro `%s'fix inesperadoregistro inesperado en la listaexpresiÃ³n sizeof_stub inesperadaclase de almacenamiento %d inesperada%d sin manejar insn CFA sin manejar para el desenredo (%d)compostura de reubicaciÃ³n local %s sin manejarcÃ³digo de operando %d sin manejartipo de reubicaciÃ³n %s sin manejarsin manejar: .proc %s,%dcÃ³digo de operaciÃ³n "%s" sin implementarsegmento %s sin implementar en el operandose usÃ³ un direccionamiento sin indizar en la instrucciÃ³n de precargadesconocidoargumento -mpid= '%s' desconocidosub-directiva .loc `%s' desconocidaEABI `%s' desconocida nivel ISA %s desconocidoISA o arquitectura %s desconocidosMCU desconocido: %s modo de direccionamiento %s desconocidomodo de direccionamiento desconocido para el operando %sextensiÃ³n de arquitectura `%s' desconocidaarquitectura desconocidaarquitectura %s desconocidaarquitectura '%s' desconocidaarquitectura `%s' desconocida argumento desconocido para .usepvcÃ³digo de condiciÃ³n desconocido: %srestricciÃ³n `%c' desconocidacpu `%s' desconocidodirectiva desconocidaescape '\%c' desconocido en la cadena; se descartase pasÃ³ un tipo de ejecuciÃ³n desconocido a write_2_short()expresiÃ³n desconocida en el operando %sexpresiÃ³n desconocida en el operando %s. Utilice #llo() #lhi() #hlo() #hhi() abi de coma flotante `%s' desconocida formato de coma flotante `%s' desconocido tipo de coma flotante desconocido tipo '%c'reubicaciÃ³n de grupo desconocidamodo IT implÃcito `%s' desconocido, debe ser arm, thumb, always o never.instrucciÃ³n '%s' desconocidainterrupciÃ³n %s desconocidacÃ³digo de operaciÃ³n desconocidocÃ³digo de operaciÃ³n "%s" desconocidocÃ³digo de operaciÃ³n %s desconocidocÃ³digo de operaciÃ³n '%s' desconocidocÃ³digo de operaciÃ³n `%s' desconocidocÃ³digo de operaciÃ³n o nombre de formato `%s' desconocidocÃ³digo de operaciÃ³n1 desconocido: `%s'cÃ³digo de operaciÃ³n2 `%s' desconocido.cÃ³digo de operaciÃ³n desconocido: %scÃ³digo de operaciÃ³n desconocido: `%s'operando %s desconocidooperando de desplazamiento desconocido: %x operando desconocido para .archoperador %s desconocidooperador %s desconocido. Â¿ Quiere decir X(Rn) Ã³ #[hl][hl][oi](CONST) ?operador desconocido (se sustituyÃ³ r%s como un nombre de registroatributo de secciÃ³n '%s' invÃ¡lido o desconocidotipo de secciÃ³n '%s' invÃ¡lido o desconocidoparÃ¡metro desconocido a continuaciÃ³n de la directiva .SECTION: %stipo de procedimiento desconocidoopciÃ³n de anÃ¡lisis de perfil desconocida - se descarta.pseudo-operador desconocido: `%s'registro '%s' desconocido -- se descarta .reqalias de registro '%s' desconocidoreubicaciÃ³n desconocida (%u)atributo de secciÃ³n %s desconocidoatributo de secciÃ³n '%c' desconocidoclase de sufijo desconocidacarÃ¡cter de formato de sintaxis `%c' desconocidofunciÃ³n definida por el usuario %s desconocidaoperando desconocido/incorrecto'[' desemparejadodirectiva end sin coincidenciano se reconoce el valor de alineaciÃ³n en la directiva .SECTION: %sno se reconoce el tipo de cpu '%s'no se reconoce el tipo .linkonce `%s'no se reconoce el atributo de .section: se quiere a,e,w,x,M,S,G,Tno se reconoce la opciÃ³n CPSno se reconocen los caracteres al final de la insn de procesamiento paralelono se reconoce el cpu por defecto `%s'no se reconoce el nombre de emulaciÃ³n `%s'no se reconoce la opciÃ³n foptno se reconoce el cÃ³digo de operaciÃ³nno se reconoce la opciÃ³n -%c%sno se reconoce el tipo de reubicaciÃ³nno se reconoce el sufijo de reubicaciÃ³nno se reconoce el atributo de secciÃ³nno se reconoce la orden de secciÃ³n `%s'no se reconoce el tipo de secciÃ³nno se reconoce el tipo de secciÃ³n `%s'no se reconoce el tipo de sÃmbolo "%s"no se reconoce el modo de sintaxis "%s"cuenta de repeticiÃ³n sin resolver o no positiva; se utiliza 1expresiÃ³n sin resolver que se debe resolversÃmbolo objetivo del ciclo sin resolver: %sse requiere un registro sin desplazarno se admiteno se admite el tamaÃ±o de reubicaciÃ³n BFD %dno se admite el tamaÃ±o de reubicaciÃ³n BFD %uno se admite el tipo DCno se admite la referencia relativa a PC a una secciÃ³n diferenteno se admite la alineaciÃ³nno se admite la alineaciÃ³n para la instrucciÃ³nno se admite el valor de byte; utilice un sufijo diferenteno se admite el tamaÃ±o de constante %d no se admite el tamaÃ±o de compostura %dno se admite la opciÃ³n %i en la directriz de lÃneano se admite la compostura fptrno se admite el tamaÃ±o de compostura fptr %dno se admite la constante largeno se admite la reubicaciÃ³nno se admite la reubicaciÃ³n contra %sno se admite el tipo de reubicaciÃ³n para el campo de desplazamiento DSno se admite el tipo de reubicaciÃ³nno se admite el atributo de secciÃ³n '%c'no se admite la sintaxisno se admiten el tamaÃ±o de la variable o el valor de rellenono se admite el registro de Ãndice de vectorno se admite con mnemÃ³nico Intelcadena sin terminarcadena sin terminar; se insertÃ³ una lÃnea nuevauntil sin repeatcÃ³digo de operaciÃ³n de desenredo demasiado largoel marco desenredado tiene tamaÃ±o negativoel puntero de pila desenredado no estÃ¡ alineado a doblewordusa -march=armv2usa -march=armv2ausa -march=armv3usa -march=armv3musa -march=armv4usa -march=armv4tusa -march=armv5usa -march=armv5tusa -march=armv5teusa -mcpu=allusa -mcpu=arm1usa -mcpu=arm2usa -mcpu=arm250usa -mcpu=arm3usa -mcpu=arm6usa -mcpu=arm600usa -mcpu=arm610usa -mcpu=arm620usa -mcpu=arm7usa -mcpu=arm70usa -mcpu=arm700usa -mcpu=arm700iusa -mcpu=arm710usa -mcpu=arm7100usa -mcpu=arm710cusa -mcpu=arm710tusa -mcpu=arm720usa -mcpu=arm720tusa -mcpu=arm740tusa -mcpu=arm7500usa -mcpu=arm7500feusa -mcpu=arm7dusa -mcpu=arm7diusa -mcpu=arm7dmusa -mcpu=arm7dmiusa -mcpu=arm7musa -mcpu=arm7tdmiusa -mcpu=arm8usa -mcpu=arm810usa -mcpu=arm9usa -mcpu=arm920usa -mcpu=arm940usa -mcpu=arm9tdmiusa -mcpu=iwmmxtusa -mcpu=strongarmusa -mcpu=strongarm110usa -mcpu=strongarm1100usa -mcpu=strongarm1110usa -mcpu=xscaleusa -mfpu=fpa10usa -mfpu=fpa11usa -mfpu=fpeuse .code16 para asegurar el modo de direccionamiento correctousa -mfpu=softfpa Ã³ -mfpu=softvfpusa puntero de marcoel uso de PC en esta instrucciÃ³n es obsoletose utilizan opciones de estilo antiguo y nuevo para establecer el tipo de CPUse utilizan opciones de estilo antiguo y nuevo para establecer el tipo de FPUel uso de r13 es obsoletoel uso de r15 en blx en modo ARM no es realmente Ãºtilel uso de r15 en bx en modo ARM no es realmente Ãºtilel uso de r15 en bxj no es realmente Ãºtilusa revisiÃ³n del tamaÃ±o de la pilase utilizÃ³ $%u sin ".set at=$%u"se utilizÃ³ $at sin ".set noat"se usa `%s%s' en lugar de `%s%s' debido al sufijo `%c'se usa una anchura de campo de bit de cerolos especificadores endian vÃ¡lidos son be o leel valor %d estÃ¡ fuera de rango. Utilice #lo() o #hi()valor %ld fuera de rangoel valor 0x%I64x se truncÃ³ a 0x%I64xel valor 0x%llx se truncÃ³ a 0x%llxel valor 0x%lx se truncÃ³ a 0x%lxel valor no estÃ¡ en el rango [-0xffffffff, 0xffffffff]el valor no estÃ¡ en el rango [0, 0x7fffffff]el valor no estÃ¡ en el rango [0, 0xffffffff]valor de %ld fuera del rango de desubicaciÃ³n de byte.valor de %ld fuera del rango de desubicaciÃ³n de double word.valor de %ld fuera del rango de desubicaciÃ³n de word.el valor de %s es demasiado grande para el campo de %d bytes en %svalor fuera de rangovalor fuera de rango: %del valor almacenado para r%d es DESCONOCIDOvalor demasiado grande para un campo de 1 bytevalor demasiado grande para un campo de 2 bytesvalor demasiado grande para caber en %d bitsse esperaba un tipo vectormemoria agotadael grupo vliw debe consistir de 1 insn core y 1 copro.aviso: el sÃmbolo %s no tiene csectlos sufijos de anchura son invÃ¡lidos en modo ARMlos sufijos de anchura son invÃ¡lidos en modo ARM -- `%s'word de NOPs agregados entre multiply de word y multiply de 16-bitword de NOPs agregados entre multiply de word y loadse debe usar writeback (!) para VLDMDB y VSTMDBla escritura hacia atrÃ¡s del registro base es IMPREDECIBLEla escritura hacia atrÃ¡s del registro base cuando estÃ¡ en la lista de registros es IMPREDECIBLEse usÃ³ escritura hacia atrÃ¡s en la instrucciÃ³n de precargaescribir o modificar # es impredecibleescribir a APSR sin especificar una mÃ¡scara de bit es obsoletonÃºmero errÃ³neo de operandosnÃºmero errÃ³neo de operandos para '%s'registro errÃ³neo en la lista de registros de coma flotantesegundo argumento errÃ³neo para .cfi_lsdasegundo argumento errÃ³neo para .cfi_personalitytercer argumento errÃ³neo para .cfi_val_encoded_addrfallo xtensa-isa: %sno se puede hacer `pop %scs'sÃ³lo debe especificar un tipo Ãºnicose utilizÃ³ una reubicaciÃ³n zdaoff() en una instrucciÃ³n que no la admitese asume cero para la expresiÃ³n faltantese utiliza cero como valor inmediato{entrada estÃ¡ndar}